Method for preparing failure analysis sample

Abstract

The invention discloses a method for preparing a failure analysis sample, which comprises a providing a sample, wherein the sample comprises a structure to be analyzed, and is provided with a first surface, the first surface is exposed out of the structure to be analyzed; forming a heavy metal layer with a first preset thickness on the first surface; after the heavy metal layer with the first preset thickness is formed, dividing the sample into two parts, selecting one part to be used as a sample to be analyzed, wherein the sample to be analyzed is provided with a second surface adjacent to the first surface, the second surface is exposed out of the structure to be analyzed; and forming a heavy metal layer with a second preset thickness on the second surface of the sample to be analyzed. The heavy metal layers are made of gold, platinum or chrome. When the sample prepared by using the method is subjected to the failure analysis, factors causing the deformation of a low-dielectric constant material and an ultra-low-dielectric constant material can be basically eliminated, original shapes of the sample can be kept and effective analysis data can be provided.

Description

technical field [0001] The invention relates to sample failure analysis in the technical field of semiconductors, in particular to a method for preparing samples for failure analysis. Background technique [0002] In the field of semiconductor technology, when using semiconductor technology to manufacture semiconductor devices, due to process defects in the semiconductor manufacturing process, such as metal particles introduced in the process, some semiconductor devices will have defects, so it is necessary to conduct failure analysis on semiconductor devices to determine Whether the manufactured semiconductor device is a qualified product. [0003] In the semiconductor process, the quality of interconnect trenches and vias (not formed on the active region or gate) or contact holes (formed on the active region or gate) is directly related to the quality of interconnect lines and plugs. Therefore, failure analysis of interconnect trenches and vias is required. Before the fa...

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Problems solved by technology

[0006] The problem to be solved by the present invention is that when using the analysis sample prepared by the existing method for failure analysis, the structure to be analyzed is easily deformed during the analysis process, and effective analysis data cannot be provided.

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