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Trench gate JFET and manufacture method thereof

A manufacturing method, trench gate technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.

Active Publication Date: 2012-04-11
CHENGDU MONOLITHIC POWER SYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In order to solve the problems described above, the present invention proposes a trench-gate JFET that can not only ensure a sufficient distance between the source region and the gate region, but also reduce the source resistance and size and its manufacturing method

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  • Trench gate JFET and manufacture method thereof
  • Trench gate JFET and manufacture method thereof
  • Trench gate JFET and manufacture method thereof

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Embodiment Construction

[0012] Exemplary embodiments of the present invention will be fully described below with reference to the accompanying drawings. In order to clearly illustrate the present invention, detailed descriptions of some specific structures and functions are simplified herein. In addition, similar structures and functions that have been described in detail in some embodiments will not be repeated in other embodiments. Although terms of the present invention are described in conjunction with specific exemplary embodiments, these terms are applicable to any reasonable occasion in the art and should not be construed as being limited to the exemplary embodiments set forth herein.

[0013] figure 2 is a cross-sectional view of a trench-gate junction field effect transistor (JFET) 200 according to an embodiment of the present invention. The trench gate JFET 200 includes a substrate 218 , an N− epitaxial layer 220 formed over the substrate 218 , at least two trenches 216 , an N+ source re...

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Abstract

The invention discloses a trench gate JFET and a manufacture method thereof, the trench gate JFET comprises: a substrate provided with a first doping type; an externally-extending layer disposed at the upper part of the substrate and provided with the first doping type; at least two grooves disposed in the externally-extending layer; a source electrode zone provided with the first doping type, disposed at the upper part of the externally-extending layer and extending between the top parts of the adjacent grooves; and a source electrode metal layer disposed at the upper part of the source electrode zone. The trench gate JFET also comprise: a polysilicon grid electrode zone disposed at the bottom part of the a trench and provided with a second doping type; and an interlayer dielectric layerdisposed at the upper part of the polysilicon grid electrode zone in the trench.

Description

technical field [0001] The invention relates to a junction field effect transistor (JFET), in particular to a trench gate JFET and a manufacturing method thereof. Background technique [0002] figure 1 Shown is a cross-sectional view of a conventional N-channel trench-gate junction field effect transistor (JFET) 100, which includes an N+ source region 102, a P-type polysilicon-filled P-type gate region 104, a P+ Implantation region 106, N- epitaxial layer 120, and N+ drain region 118 (typically the substrate). The P+ implantation region 106 is formed by implanting impurities into the bottom of the trench 116 filled with P-type polysilicon. The P-type gate region 104 is two regions separated from each other, and the region between them is the channel 108 . In addition, a source metal layer 112 is located over the oxide layer 114 and the tungsten plug 110 . The tungsten plug 110 is used to connect the N+ source region 102 and the source metal layer 112 . [0003] In order...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/808H01L29/06H01L21/337
CPCH01L29/66909H01L29/1066H01L29/8083
Inventor 李铁生奥格涅·米力克张磊
Owner CHENGDU MONOLITHIC POWER SYST