Device and method for achieving sram output characteristics from drams

Abstract

A method is provided for achieving SRAM output characteristics from DRAMs, in which a plurality of DRAMs are arranged connected in parallel to a controller in such a way as to be able to obtain SRAM output characteristics using the DRAMs, comprising a process in which data is output to an external device when a control signal for data reading has been input from the external device, by sequentially repeating a step in which the controller sends a data output state control signal to one DRAM and sends a refresh standby state control signal to the other DRAMs, the data is read and sent to the external device from the DRAM in the output state, and a refresh standby state control signal is sent to the DRAM which was in the output state while an output state control signal is sent to another DRAM and data is read out from the DRAM in the output state, and a step in which the controller sends a control signal for changing the output state to the refresh standby state.

Description

technical field [0001] The present invention relates to a device and method for embodying the output characteristics of static random access memory through dynamic random access memory, and in particular to a method of arranging multiple dynamic random access memories (DRAMs) in parallel, and controlling and updating them alternately and repeatedly in sequence on a controller (controller) And data output, can obtain the output characteristic of Static Random Access Memory (SRAM) through the device and the method of embodying the output characteristic of Static Random Access Memory (SRAM) through DRAM. Background technique [0002] Generally, the processing speed of DRAM (Dynamic Random Access Memory) is lower than that of Static Random Access Memory (SRAM; Static Random Access Memory). On the contrary, it is easier to achieve large capacity, simple circuit, and low price, so it is mainly used as The main memory of the computer, and compared with the dynamic random access mem...

AI Technical Summary

Problems solved by technology

This technology can use commonly used DRAMs in chip form or DIE form, but requires independent control of two DRAMs. Therefore, its structure is complex and data processing requires additional delay.

Not only that, because it operates two DRAMs independently, it requires separate controllers and data and address buses, which may also cause data inconsistency between the two DRAMs, so how to overcome this problem becomes a problem to be solved

In particular, as the amount of data increases, its complexity increases significantly, and sometimes it is even necessary to make and use a dedicated control chip (Controller Chip)

Therefore, it is difficult to apply this technology when it is applied to the production of a small amount of products

[0009] The above-mentioned traditional technology using two DRAMs requires independent data and address buses related to DRAMs during its application, so its circuit structure is complicated , it will also lead to data inconsistency between the two DRAMs. In order to overcome these problems, a lot of additional circuits are used

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