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Instruction processing device and processor, and instruction translating device and method

A technology of instruction processing and instruction translation, applied in the computer field to achieve the effect of speeding up efficiency, speeding up efficiency and easy realization

Active Publication Date: 2015-05-20
JIANGNAN INST OF COMPUTING TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is no reference to improving the efficiency of processor processing logic operations

Method used

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  • Instruction processing device and processor, and instruction translating device and method
  • Instruction processing device and processor, and instruction translating device and method
  • Instruction processing device and processor, and instruction translating device and method

Examples

Experimental program
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Embodiment 1

[0040] This embodiment provides an instruction translation device, which can be embedded in a compiler. reference figure 1 , The instruction translation device of the specific embodiment of the present invention includes an extracting unit 101 for extracting a logical operation expression in a source instruction, the source instruction is used to obtain the operation result of the logical expression, and the value of the logical expression There are at least two operands; the listing unit 102 is used to list the truth table of the logical expression according to the operands; the generating unit 103 is used to generate a target instruction, and the target instruction includes the truth table The value and operand of the logical expression, and the target operand.

[0041] Now that the number of operands participating in the logical expression is 2, and the logical expression is d=(x&y)|(~x&y)&y, the instruction translation device of this embodiment will be described in detail.

[...

Embodiment 2

[0049] In order to have a better understanding of the instruction translation device of the present invention, still refer to figure 1 The schematic diagram of the structure of the instruction translation device, with the number of operands participating in the logical expression being 3 and the logical expression being d=(x&y)|(~x&z), the instruction translation device of this embodiment will be described in detail.

[0050] In the process of compiling the source program, when the source instruction used to obtain the operation result of the logical expression is processed, the extraction unit 101 extracts the logical expression (x&y)|(~x&z) in the source instruction The source instruction in this embodiment can be a logical expression described in any language, such as C language, VC, etc. When the prior art compiler processes the above logical expression, it will directly translate it into at least 4 instructions, such as: first, logically invert x to obtain ~x, and then perfor...

Embodiment 3

[0058] The present invention also provides an instruction processing device for processing a target instruction generated by the instruction translation device. The target instruction is represented by a binary code and is used to obtain the operation result of a logical expression; the target instruction includes the logical expression The value and operand of the logical expression in the truth table of the formula, and the target operand; the operand of the logical expression is at least two; reference Figure 4 , Figure 4 It is a schematic structural diagram of an instruction processing device according to a specific embodiment of the present invention. The instruction processing device includes: a parsing unit 104 for parsing the target instruction, obtaining the value and operand of the logical expression in the truth table, and Target operand; the multiplexing unit 105, including a multiplexer, the any multiplexer includes a multiple data input terminal, multiple selectio...

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Abstract

An instruction processing device and a processor, and an instruction translating device and method are disclosed, wherein the instruction processing device is used for processing a target instruction which is expressed by binary codes and used for solving the operation result of a logical expression; the target instruction comprises the values and operands of the logical expression in the truth table of the logical expression, and a target operand, and there are at least two operands of the logical expression; the instruction processing device comprises: an analysis unit for analyzing the target instruction, and obtaining the values and operands of the logical expression in the truth table and the target operand; and a multipath selection unit for outputting the result of the logical operation to the target operand according to the values and operands of the logical expression in the truth table. With the instruction processing device and the processor, and the instruction translating device and method provided in the invention, the efficiency of the processor processing the logical operation is improved, the application performance of the processor is improved and the power consumption of the processor is effectively reduced.

Description

Technical field [0001] The present invention relates to the field of computers, in particular to instruction processing devices and processors, instruction translation devices and methods. Background technique [0002] The compilation process is the process of translating source code (usually a high-level language) into object code (usually a low-level language or machine language) that can be directly executed by a computer or virtual machine. And the function of the translated object code is the same as that of the source code, and finally the computer executes the object code through the processor to obtain the function to be realized by the source code. [0003] Generally speaking, a compiler is a program that translates a high-level language into a machine language. Its workflow is: source code→preprocessor→compiler→assembler→object code→linker→executables . The compiler also includes the frontend of the compiler, the analysis of the compiler and the backend of the compiler...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/45
CPCY02D10/00
Inventor 谢向辉过锋吴新军李宏亮唐勇任秀江陆晓亮
Owner JIANGNAN INST OF COMPUTING TECH