Method for repairing establishing timing sequence

Abstract

The invention discloses a method for repairing an establishing timing sequence, wherein with intervention to a clock channel, the design problems of a data channel are partially transferred to the clock channel; and the problems of the reduction of the working frequency of a chip and the increase of the designed area of the chip due to the repairing of the establishing timing sequence are solved. The method comprises the following steps of: analyzing the characteristics of a timing sequence violation and analyzing a path having a violation; when all paths with the starting points thereof as the starting points have sufficient retention time surplus and all paths with the starting points thereof as the terminal points have sufficient establishing time surplus, entering the mode of repairing the establishing timing sequence by shortening the clock delay of the path starting points; and when all paths with the terminal points thereof as the terminal points have sufficient retention time surplus and all paths with the terminal points thereof as the starting points have sufficient establishing time surplus, entering the mode of repairing the establishing timing sequence by extending the clock delay of the path terminal points. The method provided in the invention is capable of effectively reducing the circuit complexity of the design of an integrated circuit chip, increasing the working frequency of the chip and reducing the designed area of the chip in such a design manner of selecting different clock delays.

Description

technical field [0001] The invention relates to a timing sequence repair method, in particular to a timing sequence restoration method in integrated circuit layout design. Background technique [0002] Nowadays, multimedia has been widely used in people's daily life. Regardless of mobile phones, TVs, or game consoles, the design of their product chips requires perfect system functions and fast running speed. The speed determines the performance of the product, and the area of ​​the chip design directly determines the production cost. Speed ​​and area are the focus of our attention. [0003] There are several main factors that determine the operating speed and design area of ​​an integrated circuit chip: production process, code compilation style, and implementation process from code to layout. Fixing timing is one of the most important critical steps in the code-to-layout implementation process. In the traditional implementation method, processing and setting up timing re...

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a method for repairing the establishment timing, which solves the problem of reducing the working frequency caused by the unsatisfied establishment timing in the application of integrated circuits and the problem of increasing the chip area caused by repairing the establishment timing, and can effectively improve the performance of the chip. Work performance, reduce production cost

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