Randomization circuit, memory control unit, memory, communicating system and method
A randomization and memory technology, applied in the digital field, can solve problems such as insufficient disorder and low degree of randomization of PN codes, and achieve the effect of improving the degree of randomization, disorder and security
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Embodiment 1
[0055] Figure 4 The working principle of the randomization circuit provided by the embodiment of the present invention is shown, and only the parts related to the embodiment of the present invention are shown for convenience of description.
[0056] Among them, the seed generator 12 is used to generate and output an initial seed according to the input information data, before the randomization or derandomization of the data sequence written by the user or the data sequence to be sent starts, and the initial seed is in PN The binary number provided by the seed generator 12 to the PN code generator 11 before the randomization or de-randomization operation of the code generator 11 starts, and the length of the binary number is consistent with the series number n of the LFSR of the PN code generator. That is, initialize a with the output of the seed generator i .
[0057] The PN code generator 11 is configured to randomize or derandomize the data sequence according to the initi...
Embodiment 2
[0062] Figure 5 The working principle of the first seed generator provided by the embodiment of the present invention is shown, and only the parts related to the embodiment of the present invention are shown for convenience of description.
[0063] The logic operation module 41 is configured to perform logic operations on the information data from the information data input terminal and the information data fed back by the register 42 .
[0064] The register 42 is used to perform logic operations such as shifting or XOR, inversion, addition and subtraction on the information data output by the logic operation module 41, and feed back the specific information data processed by the logic operation to the logic operation module 41.
[0065] The switch S at the output end is used to turn on after the register 42 feeds back a certain number of times, so that the logic operation module 41 outputs the initial seed to the seed output end.
[0066] When the output terminal switch S i...
Embodiment 3
[0071] Image 6 The working principle of the second seed generator provided by the embodiment of the present invention is shown, and only the parts related to the embodiment of the present invention are shown for convenience of description.
[0072] The input data processing module 43 is configured to perform shift and / or inverse processing on the input information data, and output the processed information data to the logic operation module 41 .
[0073] The logic operation module 41 is configured to perform logic operations on the information data from the input data processing module 43 and the information data fed back by the register 42 .
[0074] The register 42 is used to perform logical operations such as shifting or XOR, negation, addition and subtraction on the specific information data output by the logical operation module 41, and feed back the specific information data processed by the logical operation to the logical operation module 41.
[0075] The switch S at...
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