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Flash memory control method based on command descriptors

A command descriptor, flash memory control technology, applied in electrical digital data processing, instruments, input/output to record carriers, etc., can solve problems such as increasing the burden on the host, many instructions, and large hardware decoding circuit area.

Inactive Publication Date: 2012-07-25
SHANDONG SINOCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the supporting content of the scheme described in the above-mentioned CN101477443A invention patent application publication still needs to include NFD sub-operation commands (4 instructions), micro-instruction sequence control (3 instructions) and other types of instructions (3 instructions)
As is known, in the traditional flash memory control method, the host, such as the CPU, only needs to issue functional commands without writing the control flow, so that the burden on the host is small; obviously, based on the above-mentioned disclosed scheme, it is necessary to compile an operation sequence, and there are many instructions used , the implementation method is relatively complex, which will inevitably increase the burden on the host, and the corresponding hardware decoding circuit area will also be relatively large

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  • Flash memory control method based on command descriptors

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Embodiment Construction

[0029] Refer to the attached figure 2 , the figure describes a hardware structural block diagram of a single-channel flash controller based on the command descriptor-based flash memory control method of the present invention, supports 8-port flash memory interface, and the command descriptor written by the host computer or CPU exists in the system RAM . In the picture:

[0030] AHB (Advanced High performance Bus, system bus) host port: used for the flash memory controller to read and write data to the SOC (System on Chip, system on chip) chip system through the system bus.

[0031] AHB slave port: AHB bus device end, connected with non-flash memory controller, used for CPU to read and write flash memory controller through system bus.

[0032] Bus decoding module: connect to the AHB slave port, decode the AHB bus request, and send the read and write requests to the corresponding lower devices connected to it, such as figure 2 Register Bank, Descriptor Control Block, and Us...

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Abstract

The invention discloses a flash memory control method based on command descriptors, which is applied to controlling an NAND flash memory. The method includes: a host edits the command descriptors according to a user's needs, an NAND flash controller downloads the command descriptors and parses the command descriptors, and parsed commands are executed. The flash memory control method is capable of simplifying support commands, and is simple, and accordingly burden of the host is reduced greatly and the size of a hardware decoding circuit is reduced.

Description

technical field [0001] The invention relates to a flash memory control method, in particular to a NAND flash memory control method. Background technique [0002] Flash memory devices are well known, and flash memory devices on the market are generally classified into NOR (or not) devices and NAND (nand not) devices according to the interconnection of individual memory cells in a cell sequence. Regarding the latter, NAND Flash Device (NFD) is widely used in the industry due to its lower cost, faster writing and erasing speed, and more suitable data storage than NOR devices. However, due to the complexity of NAND management and control, the NAND flash memory standardization organization has not yet formulated a unified interface standard, resulting in a wide variety of NAND flash memories on the market, which will inevitably increase the difficulty of flash memory controller design. Therefore, it is necessary to provide new The flash memory control method is used to shield or...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F13/16
Inventor 张洪柳陆崇心李峰王运哲赵阳
Owner SHANDONG SINOCHIP SEMICON