Rare-vector-sequence-activated lossless detection method for hardware Trojans in integrated circuits
A vector sequence and integrated circuit technology, applied in the field of detection of malicious circuit modules, can solve problems such as detection and killing, and achieve the effect of avoiding threats and ensuring safety
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Embodiment 1
[0020] Because the activation of the hardware Trojan horse must be intentionally motivated, and this kind of incentive has nothing to do with the system designer, no matter it is wired or wirelessly connected, there must be a long distance, so the activation signal is usually loaded by serial communication.
[0021] In this embodiment, the integrated circuit to be tested is a serial data transmission integrated circuit implanted by the research group with a hardware Trojan horse. The transmission speed of the circuit receiving data is 115kbps, the data is CRC check data, each frame of data is 7 data bits + 4 check bits, the normal working current consumption is less than 20uA, and the bit error rate is less than 0.1%.
[0022] The specific test method is: use the phase-locked loop embedded in Xilinx's XC6VHX565T to achieve a high-precision test system clock. In this example, the integrated circuit chip is directly tested, and the integrated circuit is powered separately by a hi...
Embodiment 2
[0113] In this example, the integrated circuit to be tested is a serial data transmission integrated circuit implanted by the research group with another hardware Trojan horse. The transmission speed of the circuit receiving data is 115kbps, the normal data is CRC check data, each frame of data is 7 data bits + 4 check bits, the normal working current consumption is less than 20uA, and the bit error rate is less than 0.1%.
[0114] The specific test method is: use the phase-locked loop embedded in Xilinx's XC6VHX565T to realize a high-precision test system clock. In this example, the integrated circuit chip is directly tested, and the integrated circuit is powered by a high-precision power supply, and its current consumption and current consumption are monitored. Output port signal. And the rare vector sequence excitation generating circuit and the integrated circuit under test are powered separately.
[0115] In this example, the normal data received by the integrated circui...
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Abstract
Description
Claims
Application Information
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