Multi-chip packaging structure of power conversion chip

Abstract

The invention relates to a packaging structure of a power conversion chip. The packaging structure comprises a packaging tube shell, a chip seat, a first chip, a second chip, a non-conductive adhesive, a conductive adhesive, a plurality of first bonding wires and a plurality of second bonding wires, wherein a bottom plate of the chip seat carries the first chip; the front surface of the first chip is upward; the first chip is fixedly adhered to an appropriate position of the bottom plate of the chip seat through the conductive adhesive; the first chip carries the second chip; the front surface of the second chip is upward; the second chip is fixedly adhered to the appropriate position of the first chip through the non-conductive adhesive; the first chip is electrically connected with pins of the chip seat through the first bonding wires; the second chip is electrically connected with the pins of the chip seat and the first chip through the second bonding wires; the packaging tube shell packages the bottom plate of the chip seat, the first chip, the second chip, the non-conductive adhesive, the conductive adhesive, the first bonding wires and the second bonding wires; and the pins of the chip seat are exposed out of the packaging tube shell to form the pins of a packaged integrated circuit.

Description

technical field [0001] The present invention relates to the field of integrated circuits, in particular to integrated circuit chip packaging technology, and in particular to a power conversion chip packaging structure. Background technique [0002] At present, the development of integrated circuits is very fast, especially in the trend of miniaturization of integrated circuit chips. The functional requirements of integrated circuit chips are becoming more and more diversified, and the manufacturing process of dies is becoming more and more rigorous, especially for high-power power conversion chips. The heat generated continues to increase, so we need a new packaging structure, which can not only have a smaller packaging volume, but also quickly and effectively dissipate heat to avoid damage to the chip and hardware circuits caused by overheating of the integrated circuit chip. [0003] figure 1 It is a cross-sectional view of a multi-chip package structure of a power conver...

AI Technical Summary

Problems solved by technology

[0005] Although figure 1 The packaging method can meet the basic requirements of multi-chip packaging of power conversion chips, but because the first chip 12 and the second chip 13 are placed in parallel in the structure, the chip area is larger, the chip cost is increased, and the heat dissipation of the chip is difficult.

Therefore, this packaging method is not suitable for some power conversion chip products that require low cost, high density, high precision, and high power.

Images