Silicon on insulator (SOI) metal oxide semiconductor (MOS) transistor

Abstract

The invention provides a silicon on insulator (SOI) metal oxide semiconductor (MOS) transistor, which comprises an active region formed in an SOI layer of an SOI substrate, a grid covering part of active region, a source region and a drain region, wherein the source region and the drain region are positioned in the active region on two sides of the grid in the length direction respectively; the width of the border part of the source region and the grid is the same as that of the border part of the drain region and the grid; the active region covered by the grid comprises a channel region which extends between the source region and the drain region at the width of the border part of the source region or the drain region and the grid; the active region comprises at least two comb-tooth-shaped bulges which are formed on one side or two sides of the channel region in the width direction at certain intervals along the length direction of the channel region; and part of the tail end of each comb-tooth-shaped bulge, which is not covered by the grid, is a bulk contact region. By the SOI MOS transistor, side electricity leakage, bulk resistance and parasitic capacitor can be reduced.

Description

technical field [0001] The invention relates to the field of semiconductor transistors, in particular to an SOI MOS transistor capable of suppressing the floating body effect of the SOI MOS (Metal Oxide Semiconductor) transistor. Background technique [0002] SOI (Silicon On Insulator) refers to silicon-on-insulator technology, and SOI technology is recognized as one of the mainstream semiconductor technologies in the 21st century. SOI technology effectively overcomes the shortage of bulk silicon materials, fully exploits the potential of silicon integrated circuit technology, and is gradually becoming the mainstream technology for manufacturing high-speed, low power consumption, high integration and high reliability VLSI. [0003] SOI MOS is divided into partially depleted SOI MOS (PDSOI) and fully depleted SOI MOS (FDSOI) according to whether the active body region is depleted. Generally speaking, the top silicon film of fully depleted SOI MOS is relatively thin, and the ...

AI Technical Summary

Problems solved by technology

[0006] H-type gate SOI MOS devices have source-body, drain-body parasitic capacitances, and parasitic resistances. As L increases, parasitic capacitances and parasitic resistances increase, affecting device performance.

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