116 results about "Bulk resistance" patented technology

Resistive elements include a patterned region of nanofabric having a predetermined area, where the nanofabric has a selected sheet resistance; and first and second electrical contacts contacting the patterned region of nanofabric and in spaced relation to each other. The resistance of the element between the first and second electrical contacts is determined by the selected sheet resistance of the nanofabric, the area of nanofabric, and the spaced relation of the first and second electrical contacts. The bulk resistance is tunable.

Resistive elements include a patterned region of nanofabric having a predetermined area, where the nanofabric has a selected sheet resistance; and first and second electrical contacts contacting the patterned region of nanofabric and in spaced relation to each other. The resistance of the element between the first and second electrical contacts is determined by the selected sheet resistance of the nanofabric, the area of nanofabric, and the spaced relation of the first and second electrical contacts. The bulk resistance is tunable.

A composite oxide sintered body includes In, Zn, and Sn, and has a relative density of 90% or more, an average crystal grain size of 10 μm or less, and a bulk resistance of 30 mΩcm or less, the number of tin oxide aggregate particles having a diameter of 10 μm or more being 2.5 or less per mm2 of the composite oxide sintered body.

The invention discloses a metal oxide semiconductor gas sensor and a preparation method thereof. The semiconductor gas sensor comprises a substrate, a heating layer which is arranged on the substrate, a functional layer which is arranged on the substrate and insulated from the heating layer, wherein the functional layer comprises a signal electrode and a detection layer which are electrically connected with each other; the detection layer comprises a first film layer and a second film layer which are sequentially formed on the substrate; the first film layer is smaller than the second film layer in specific surface area. According to the semiconductor gas sensor disclosed by the invention, the detection layer is configured to comprise the first film layer and the second film layer which are different in specific surface area; the first film layer which is smaller in specific surface area is taken as a bulk resistor layer for stabilizing bulk resistance and preventing excursion of the bulk resistance of the detection layer; the second film layer which is larger in specific surface area is taken as a gas sensitive layer for detecting target gas, so that the service life of the semiconductor gas sensor is prolonged and relatively high detection precision is guaranteed.

Unitized probe tip assemblies of reduced size for a micro-browser use surface mount components in an isolation / coupling network that may include a parallel RC combination in series with a damping resistor. These surface mount components are soldered directly to one another without the use of a substrate. A pointed contact tip is soldered directly to one end of the surface mount components, and at the other end of those components is soldered the center conductor of a coaxial transmission line leading to a replication amplifier. A portion of the isolation / coupling network is enclosed within a supporting conductive shield that is also soldered to the outer conductive shield of the coaxial cable, which may be a semi-rigid micro coax (which might also be of a memory metal, such as Nitinol) that transitions into a flexible coaxial cable after leaving a slot in a sleeve that carries stationary and rotating rods (which might also be of a memory metal) to which the unitized probe tip assemblies are attached. In an alternate embodiment the isolation / coupling network may be a shaft of resistive diamond having a sharp tip at one end where it has a low bulk resistance the functions as a series damping resistance, which shaft also has toward the other end a much higher bulk resistance that functions as an isolation resistance that is also shunted by a coupling capacitance formed of a conductive pattern printed on the outside of the region of higher bulk resistance.

A variable resistance element (1) whose resistance changes with application of a voltage pulse is brought to a low resistance state by applying an erase pulse to a path shown by the broken line through selection of selection transistors. An erase pulse limiting resistance (2) is inserted in the broken-line path. The resistance value (Re) of the erase pulse limiting resistance (2) is set so that a first resistance value as the sum of all the ON resistance values of the selection transistors, Re and the wiring resistance in the path is equal to or more than a bulk resistance value of a thin film material used in the variable resistance element (1), to prevent the resistance of the variable resistance element (1) from decreasing to the bulk resistance value at which stable resistance change is not resumed.

The present invention relates to polyimide film for insulating material etc. prepared by reacting a mixture of 4,4-oxydiphthalic anhydride and at least one monomer of aromatic or aliphatic tetracarboxylic dianhydride with a mixture of p-phenylenediamine and at least one monomer of flexible diamines, and having excellent electric properties such as a coefficient of thermal expansion, an elongation, a intensity, a dielectric strength and a bulk resistance etc, a TAB tape applying the polyimide film, and flexible printed wiring board.

A sputtering target, which contains Al2O3: 0.2 to 3.0 atomic%, MgO and / or SiO2: 1 to 27 atomic%, and the balance is ZnO, which has low refractive index and low volume resistance. A method for manufacturing a sputtering target, the sputtering target has low refractive index and low volume resistance, wherein the raw material Al2O3 powder and ZnO powder are pre-mixed and pre-calcined, and then the calcined Al2O3-ZnO mixed powder Mix MgO and / or SiO2 powder in and sinter. The present invention provides a target for forming an optical thin film that does not contain sulfur, has low volume resistance, can realize DC sputtering, and has a low refractive index, and a manufacturing method thereof. Since it has a high transmittance and is composed of a non-sulfide system, it is useful for the formation of a thin film for an optical information recording medium that is less prone to degradation of the adjacent reflective layer and recording layer. Improvement in the characteristics of the optical information recording medium, reduction in equipment cost, and significant improvement in throughput through an increase in film formation speed can be achieved.

The invention discloses a growth method of a gallium-nitride-based epitaxial wafer. In the epitaxial wafer, triethyl gallium used as a metal organic source of gallium and di (cyclopentadienyl) magnesium used as an acceptor impurity growth p-type cavity injection layer are adopted between a multiple quantum well layer and a p-type AlGaN layer; and according to the growth structure, the bulk resistance of the p-type layer is reduced, the effective concentration of the injected cavity is improved, the effective compound of the cavity and an electron in an active region is enlarged, and the luminous efficiency of a light-emitting diode (LED) is improved. According to a standard chip process, a chip which has a size of 300*200 mu m<2> and uses Indium tin oxide (ITO) as a transparent electrode is manufactured, the forward voltage of the chip can be reduced by 0.15V, and the light transmission efficiency is improved by above 17%.

An antifuse having a link including a region of unsilicided semiconductor material may be programmed at reduced voltage and current and with reduced generation of heat by electromigration of metal or silicide from a cathode into the region of unsilicided semiconductor material to form an alloy having reduced bulk resistance. The cathode and anode are preferably shaped to control regions from which and to which material is electrically migrated. After programming, additional electromigration of material can return the antifuse to a high resistance state. The process by which the antifuse is fabricated is completely compatible with fabrication of field effect transistors and the antifuse may be advantageously formed on isolation structures.

The invention relates to lead-free electrocondution slurry used for a crystalline silicon solar cell back electrode. The lead-free electrocondution slurry used for the crystalline silicon solar cell back electrode consists of the following components in percentage by weight: 40-70wt% of silver plating copper powder, 2-10wt% of inorganic lead-free glass powder and 25-50wt% of organic carrier, wherein the organic carrier is the mixture of solvent, thickening agent and additive, and the prepared electrocondution slurry printing back electrode has the advantages of big thickness, small bulk resistance, excellent soldering resistance, strong welding adhesive force and silver ion migration resistance. Meanwhile, after cell pieces are subjected to series welding, an assembly has the advantages of higher stability and stronger anti-aging capability.

The invention discloses a graphene device and a production method thereof. A gate region provided with a metal gate is formed on a graphene substrate and contact plug structures containing nanoscale catalyst metal grains and carbon nano-tubes on the nanoscale catalyst metal grains are formed on graphene at two sides of the gate region; the nanoscale catalyst metal grains not only have the function of inducing the carbon nano-tubes to grow, but also have the function of adjusting barrier height when the carbon nano-tubes contact the graphene, so that the contact resistance of the graphene device is reduced; and since the carbon nano-tubes have high conductivity, the bulk resistance of a contact plug is greatly reduced, and further the parasitic resistance of the graphene device is reduced and the performance of the device is improved.

The present invention provides a MOS transistor device for providing ESD protection including at least one interleaved finger having a source, drain and gate region formed over a channel region disposed between the source and the drain regions. The transistor device further includes at least one isolation gate formed in at least one of the interleaved fingers. The device can further include a bulk connection coupled to at least one of the source, drain and gate regions via through at least one of diode, MOS, resistor, capacitor inductor, short, etc. The bulk connection is preferably isolated through the isolation gate.

The invention relates to a high-performance electrolyte formula used for a lithium ion battery, which belongs to the technical field of the electrolyte of the lithium ion battery. The formula is characterized in that novel lithium salt, namely lithium bis (oxalato) borate (LiBOB) is adopted as electrolyte salt, annular carboxylic ester gamma-butyrolactone (GBL), ethylene carbonate (EC), and one or two linear carboxylic esters as organic solvent, and one or two of film formation additives, vinylene carbonate (VC) and ethylene sulfite (ES) is (are) added. Compared with carbonic ester solvent, the multi-component solvent has the advantages that the solubility of LiBOB is greatly enhanced, the electric conductivity of the electrolyte is higher, the electrochemical stability is good, the bulk resistance is lower, and the requirement of the lithium ion battery can be satisfied. When the high-performance electrolyte is applied to an experimental half element, the high and low temperature cycle performance of the tested battery is good, and the specific discharge capacity is increased.

A variable resistance element (1) whose resistance changes with application of a voltage pulse is brought to a low resistance state by applying an erase pulse to a path shown by the broken line through selection of selection transistors. An erase pulse limiting resistance (2) is inserted in the broken-line path. The resistance value (Re) of the erase pulse limiting resistance (2) is set so that a first resistance value as the sum of all the ON resistance values of the selection transistors, Re and the wiring resistance in the path is equal to or more than a bulk resistance value of a thin film material used in the variable resistance element (1), to prevent the resistance of the variable resistance element (1) from decreasing to the bulk resistance value at which stable resistance change is not resumed.

An oxide sintered compact made of indium (In), gallium (Ga), zinc (Zn) and oxygen (O) and represented by a formula of InxGayZnzOa [wherein x / (x+y) is 0.2 to 0.8, z / (x+y+z) is 0.1 to 0.5, and a=(3 / 2)x+(3 / 2)y+z], wherein the concentration of volatile impurities contained in the oxide sintered compact is 20 ppm or less. Provided is technology for application to the production of an IGZO target capable of achieving high densification and low bulk resistance of the sputtering target, preventing swelling and cracks of the target during the production process, minimizing the generation of nodules, inhibiting abnormal discharge, and enabling DC sputtering.

The invention discloses a low-pressure and low-humidity gas diffusion layer, a fuel cell and a preparation method. The gas diffusion layer comprises a conductive porous substrate layer, a hydrophobiclow-humidity adaptation layer and a micro-porous low-pressure adaptation layer. The conductive porous substrate layer includes a carbon fiber substrate sub-layer, a compressive sub-layer and uniformlydistributed conductive particles. The hydrophobic low-humidity adaptation layer is at least formed on the surface of the conductive porous substrate layer, and can lock a part of water to keep a proton exchange membrane wet in a low-humidity (0-70%) operation environment. The micro-porous low-pressure adaptation layer includes a porous material which is formed on one side of the hydrophobic low-humidity adaptation layer and uniformly distributed. The micro-porous low-pressure adaptation layer is hydrophobic, and the pores can ensure that the fuel permeates the gas diffusion layer and reachesthe proton exchange membrane to participate in the reaction in a low-pressure (0-75kPa) operation environment. Through the technical scheme, the mechanical strength of the gas diffusion layer can be improved, the gas diffusion layer has excellent gas diffusion performance and drainage performance, the fuel cell is enabled to operate stably in low-pressure and low-humidity environments, and technical support is provided for the adjustment of the bulk resistance.

An indium oxide sintered compact containing zirconium as an additive, wherein the ratio of atomic concentration of zirconium to the sum of the atomic concentration of indium and the atomic concentration of zirconium is in the range of 0.5 to 4%, the relative density is 99.3% or higher, and the bulk resistance is 0.5 mΩ·cm or less. This invention aims to provide an indium oxide transparent conductive film of high transmittance in the visible light region and the infrared region, with low film resistivity, and in which the crystallization temperature can be controlled, as well as the manufacturing method thereof, and an oxide sintered compact for use in producing such transparent conductive film.

The invention discloses a double-winding resistance wire and a manufacture process for making the same into a heating tube. The resistance wire comprises a resistance wire body, the middle of the resistance wire body is bent to form a middle bending part, the resistance wire parts at the two ends of the middle bending part are spirally bent to form two spiral parts, and the two spiral parts cross each other to form a hollow cylinder. The spiral parts are each composed of multiple continuous coiled rings formed by spirally bending the resistance wire, and each coiled ring part of one spiral part is inserted into two corresponding coiled ring parts of the other spiral part. By adopting a double-winding structure, a manufactured heating tube is uniform in internal heating. Meanwhile, a binding post is disposed at the topmost end of a heating wire and is not affected by temperature. By using the heating tube manufacture process, the product has a more solid structure, is safer, and has a longer service life.

The invention provides a silicon on insulator (SOI) metal oxide semiconductor (MOS) transistor, which comprises an active region formed in an SOI layer of an SOI substrate, a grid covering part of active region, a source region and a drain region, wherein the source region and the drain region are positioned in the active region on two sides of the grid in the length direction respectively; the width of the border part of the source region and the grid is the same as that of the border part of the drain region and the grid; the active region covered by the grid comprises a channel region which extends between the source region and the drain region at the width of the border part of the source region or the drain region and the grid; the active region comprises at least two comb-tooth-shaped bulges which are formed on one side or two sides of the channel region in the width direction at certain intervals along the length direction of the channel region; and part of the tail end of each comb-tooth-shaped bulge, which is not covered by the grid, is a bulk contact region. By the SOI MOS transistor, side electricity leakage, bulk resistance and parasitic capacitor can be reduced.

The invention relates to the field of display technologies, and provides a pressure sensing substrate and a pressure sensing touch screen, which aim to solve the problem of a complex structure of the conventional pressure sensing touch screen. The pressure sensing substrate comprises a substrate, a transparent electrode layer, and a plurality of elastic strain sensors, wherein the transparent electrode layer is arranged on the substrate, and comprises a plurality of transparent bar-shaped electrodes which are arranged in parallel; the elastic strain sensors are arranged on the transparent electrode layer, and each elastic strain sensor is in electrical contact with at least one transparent bar-shaped electrode; and the elastic strain sensors are deformed when pressed, and the bulk resistance of each elastic strain sensor changes with the deformation quantity of the elastic strain sensor. The pressure sensing substrate is applied in the pressure sensing touch screen and used for sensing pressures.

The invention provides a fan blade which comprises a sealed fan shell body. The fan shell body is formed by an upper shell and a lower shell in a butt joint mode. A shearing resistance web is arranged inside a cavity formed by the fan shell body. The top end and the bottom end of the shearing resistance web are respectively and fixedly connected with a beam cap on the upper shell and a beam cap on the lower shell. A connecting body is arranged between the shearing resistance web and the rear edge of the fan blade inside the cavity, and the connecting body is respectively and fixedly connected with the upper shell and the lower shell. The fan blade improves the bulking resistance capacity of the rear edge of the fan blade, the tackless phenomenon at the position of the rear edge of the fan blade is effectively avoided through fixed connection between the upper shell and the connecting body and the fixed connection between the lower shell and the connecting body, failures caused by insufficient stability of the rear edge of the fan blade are prevented, and therefore normal power generation of a wind turbine generator is guaranteed.

Provided is a quaternary alloy sputtering target comprising copper, indium, gallium, and selenium. Said quaternary alloy sputtering target is characterized by a composition represented by the composition formula CuIn1 - x Ga x Se2 -y (with x and y representing atomic ratios), a composition range of 0 x = 0.5 and 0 = y = 0.04, and a relative density of at least 90%. The provided CIGS quaternary alloy sputtering target has a high density, a low oxygen concentration, and a desired bulk resistance.

An antifuse having a link including a region of unsilicided semiconductor material may be programmed at reduced voltage and current and with reduced generation of heat by electromigration of metal or silicide from a cathode into the region of unsilicided semiconductor material to form an alloy having reduced bulk resistance. The cathode and anode are preferably shaped to control regions from which and to which material is electrically migrated. After programming, additional electromigration of material can return the antifuse to a high resistance state. The process by which the antifuse is fabricated is completely compatible with fabrication of field effect transistors and the antifuse may be advantageously formed on isolation structures.

Provided are an ITO sintered body, an ITO sputtering target material and an ITO sputtering target, for forming an ITO film having excellent properties with improved yield, especially an ITO sputtering target material and an ITO sputtering target, for obtaining the film having low resistance and excellent amorphous stability by using an ITO sintered body having a low bulk resistance value. A method for manufacturing the ITO sintered body suitable for such ITO sputtering target material and the ITO sputtering target is also provided. The ITO sintered body is an ITO (Indium-Tin-Oxide) sintered body wherein a fine particle composed of In4Sn3O12 exists in an In2O3 mother phase, i.e., the main crystal grain. The fine particle has substantially a chamfered cubic shape.

The invention provides a sintered compact and an amorphous film. The sintered compact is characterized by comprising zinc (Zn), trivalent metal elements, germanium (Ge) and / or silicon (Si), and oxygen (O), wherein, if the total content of the trivalent metal elements is A mol% in terms of oxides and the total content of Ge and or Si is B mol% in terms of GeO2 and / or SiO2, 15<=A+B<=70. According to the invention, the sintered compact has low bulk resistance and is capable of performing DC sputtering. The sintered compact can be used to form the amorphous film with a low refractive index.

The invention discloses a low-power-consumption gas leakage alarm which comprises an alternating current power source, a power source circuit, a gas sensor, a first potentiometer, a second potentiometer, a fifth diode, a silicon controlled rectifier, a forth capacitor, a relay, a loudspeaker and a fan motor. The gas sensor and the second potentiometer form a voltage divider to detect air. When there is no combustible gas in the air, bulk resistance between a positive pole input end and a negative pole input end of the gas sensor is large, outputs voltages of the second potentiometer are lower than 2.5V, and the gas sensor is in a still state; when the gas content in the air increases, output voltages of the second potentiometer are higher than 2.5V, the gas sensor is connected, the relay is closed, a first normally-open switch of the relay is closed, and an exhaust fan is powered on and operates to exhaust air. According to the low-power consumption gas leakage alarm, starting control sensitivity of circuit alarming can be changed by adjusting resistance of the potentiometers, and the low-power consumption gas leakage alarm has the advantages of being stable in performance, little in power consumption, simple in circuit, and convenient to install and adjust.

The invention includes methods of forming metal silicide having bulk resistance of less than 30 micro-ohms-centimeter. The metal of the metal silicide can be selected from Groups 3, 4, 8, 9 and 10 of the periodic table, with an exemplary metal being titanium. An exemplary method includes forming a titanium-containing layer directly against tantalum silicide. After the titanium-containing layer is formed directly against the tantalum silicide, titanium of the titanium-containing layer is converted to titanium silicide. Constructions formed in accordance with methodology of the present invention can be incorporated into circuitry associated with semiconductor devices, such as, for example, wordlines and bitlines.