Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

107results about How to "Lower bulk resistance" patented technology

Technology for manufacturing selective emitter junction solar cell by printed phosphorous source one-step diffusion method

The invention relates to technology for manufacturing a selective emitter junction solar cell by a printed phosphorous source one-step diffusion method. The method comprises the following steps of: cleaning and texturing a silicon wafer, performing screen printing of phosphorous-containing nano Si slurry, drying at the temperature of between 200 and 350 DEG C for about 20 minutes, and removing the solvent to obtain a phosphorous-containing oxidation layer with the thickness of 30 to 100nm; implementing BOE and RCA cleaning to remove 70 percent of surface phosphorous slurry before diffusion; putting the silicon wafer into a diffusion furnace, adding a POCL3 air source, heating to between 800 and 1,000 DEG C, forming re-diffusion at a grid line of the phosphorous-containing nano slurry on the silicon wafer to form a higher surface concentration-heavily doped region, and forming a shallow diffusion region in other areas. By adopting the screen printing of the phosphorous-containing nano slurry, the phosphorous-containing nano slurry is heated at high temperature for diffusion, forms the heavily doped region at a contact position with the grid line and forms a lightly doped region in other areas. The technology has the efficiency of over 18.5 percent on the premise of better controlling the diffusion uniformity.
Owner:TRINA SOLAR CO LTD

Crystalline silicon solar cell with high-photoelectric conversion efficiency and manufacturing method thereof

The invention discloses a crystalline silicon solar cell with high-photoelectric conversion efficiency and a manufacturing method thereof. The cell comprises a crystalline silicon P-N node substrate, a back electrode and a front gate electrode, wherein the back electrode is in ohmic contact with the P area of the crystalline silicon P-N node substrate; the front gate electrode is in ohmic contact with the N area of the crystalline silicon P-N node substrate; the front gate electrode is wrapped under the antireflection layer and comprises a SiO2 layer and an antireflection layer; the SiO2 layer is positioned on the surface of the N area of the crystalline silicon P-N node substrate; and the antireflection layer is arranged on the SiO2 layer. The manufacturing method comprises a cleaning and flocking step, a diffusing and knotting step, a phosphorus-washing and etching step, a back electrode-preparing step, a photoinduced front gate electrode electroplating step, an oxidizing and sintering step, a front gate electrode electroplating step and an antireflection layer preparing step. The photoinduced front gate electrode electroplating step and the oxidizing and sintering step are adopted, so that the cell has the characteristics of simple production process, high efficiency, low cost, low front gate electrode shade loss of the solar cell, low contact resistance and body resistance, uneasiness in line breaking of the thin front gate electrode, low cell surface reflectivity and high photoelectric conversion efficiency.
Owner:YUNNAN UNIV

SOI dynamic threshold transistor

The invention provides an SOI dynamic threshold transistor which comprises a semiconductor substrate, a first multi-interdigital gate structure, a second multi-interdigital gate structure, a body contact region, a source region, a drain region and a first contact hole. A grid electrode is connected with the body contact region through the first contact hole. By the adoption of a body contact region sharing method, the utilization rate of the body contact region can be increased, and parasitic capacitance can be lowered; meanwhile, by the adoption of a multilateral connection mode, low gate resistance can be obtained. When a device is in a cut-off state, the threshold of the device is high, and the leaked current is low; when the device is in an on state, the threshold voltage of the device is lowered and the current is increased under the influence of the bulk effect. As a result, the device can have a steep sub-threshold slope and a large saturation current; meanwhile, the working voltage of the device is low, and the device is quite suitable for application at low power consumption. By the adoption of the design method, a parasitic resistor and a parasitic capacitor can be improved, and the SOI dynamic threshold transistor has certain application value in the radio frequency application field.
Owner:SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI

Method for manufacturing body-contact structure of partially depleted SOI MOSFET

ActiveCN101621009AReduce possession effectInhibition of possession effectSemiconductor/solid-state device manufacturingMOSFETBody contact
The invention discloses a method for manufacturing a body-contact structure of a partially depleted SOI MOSFET, which comprises the following steps: selecting a P<100>SOI epitaxial wafer and subjecting the SOI epitaxial wafer to primary Trench corrosion; performing secondary Trench corrosion to form an isolation layer between a source leading-out end and a body leading-out end and preserving a space between the bottom of a trench and a BOX layer to preserve a body leading-out channel for lateral body contact; stripping SiN completely, growing a SiO2 mask film and etching the SiO2 mask film to form injection windows of two local buried oxide layers; injecting the local buried oxide layers to form local buried oxide layers under source and drain regions; forming an active region by photoetching, performing tuned grid injection twice, controlling the thickness of a silicon film by sacrificial oxidation, growing gate oxide, depositing polysilicon, etching a polysilicon gate, performing LDD injection and side wall isolation, performing source and drain end injection to form a drain end and a source end, performing body leading-out end injection, growing source and drain silicide and performing PMD and planarization; and photoetching and etching contact holes, depositing a metal layer to form a pad layer and alloy, and performing back treatment.
Owner:BEIJING ZHONGKE XINWEITE SCI & TECH DEV

Manufacturing method of N-type TOPCon solar cell

The invention relates to a manufacturing method of an N-type TOPCon solar cell. The manufacturing method comprises the following steps: a, double-sided texturing; b, single-sided spin coating; c, single-sided oxidation: forming a boron-containing silicon oxide layer on a spin coating surface; d, forming a heavily doped region substrate and a lightly doped region substrate: forming an organic masklayer for protecting a heavily doped region at a position corresponding to the metal gate line by using a mask mode, completely removing the boron-containing silicon oxide layer and the boron source outside the coverage area of the organic mask layer by using HF, and then removing the organic mask layer; and e, heavy doping and light doping: specifically, completely pushing the spin-coated boron source into the silicon substrate through a tubular low-pressure diffusion method, forming a heavy doping region is formed, carrying out whole-surface source-through deposition to form a lightly dopedregion, and finally, carrying out high-temperature oxidation to form a BSG layer with the thickness of 80-100nm, and then carrying out normal subsequent processes. According to the invention, a boronselective emitter can obtain higher photoelectric conversion efficiency, so that the conversion efficiency of the solar cell is improved.
Owner:常州顺风太阳能科技有限公司

Two-way ultralow capacitance transient voltage suppressor and production method thereof

The invention relates to a two-way ultralow capacitance TVS (Transient Voltage Suppressor) and a production method thereof. The TVS comprises a semiconductor substrate of a first conductive type, a first epitaxial layer of a second conductive type, a third epitaxial layer of the first conductive type, a first buried layer of the second conductive type, a first doped region of the second conductive type, a second doped region of the first conductive type, a first groove, a second groove, a first insulating medium, a third groove and an active region, wherein the first buried layer is formed between the first epitaxial layer and the third epitaxial layer; the first doped region is formed by being opposite to the first buried layer in the third epitaxial layer; the second doped region is formed in the third epitaxial layer and is not opposite to the first buried layer; the first groove extends to the inside of the semiconductor substrate from the surface of the third epitaxial layer; the second groove extends from the surface of the third epitaxial layer and penetrates through the third epitaxial layer; the first groove and the second groove are filled with the first insulating medium; the third groove extends from the surface of the third epitaxial layer and penetrates through the first buried layer to the inside of the first epitaxial layer; the active region is formed by annealing in-situ polycrystalline silicon loaded in the third groove.
Owner:BEIJING YANDONG MICROELECTRONICS

Solar cell and method for producing grid line electrode of solar cell

The invention discloses a solar cell and a method for producing a grid line electrode of the solar cell. The method for producing the grid line electrode is that a layer of transparent insulation material is coated or settled on a cell surface; the transparent insulation material on grid lines is removed through using a laser scribing method, a die pressing method, a dry / wet etching method and the like, and the grid lines are exposed; and a conducting material which is used as a grid line electrode is plated on the grid line through using a plating method. The method for producing the grid line electrode can form a circuit pattern of the grid line electrode at one time, so that the production efficiency is effectively improved, moreover, the production temperature can be indoor temperature, and the performance of a current generation body cannot be influenced; the method for producing the grid line electrode is relatively simple, does not have unnecessary steps, and the arranged transparent insulation material can well protect the cell, so that the product service life is prolonged; and the method for producing the grid line electrode can also relatively accurately control the thickness and the width of the grid line electrode, the material utilization rate is also high, and the production cost is relatively low.
Owner:福建钜能电力有限公司 +1

Modified silver thick film sizing agent for crystalline silicon solar cell and preparation method thereof

The invention discloses a modified silver thick film sizing agent for a crystalline silicon solar cell and a preparation method thereof. The modified silver thick film sizing agent comprises the following ingredients by weight percentage: conductive superfine silver powders accounting for 75 to 90 percent, glass powders accounting for 1 to 8 percent, and organic phases accounting for 9 to 17 percent; in addition, the modified silver thick film sizing agent also comprises surface active agents accounting for 0.05 to 2 percent of the total weight of the conductive superfine silver powders and the glass powders. According to the invention, the surfaces of the powders are coated with a layer of surface active agents, so that the aggregation condition of the powders can be improved, the powders can be dispersed in the organic phases better so as to form a more stable sizing agent system, at the same time, the scraper fineness of the sizing agent can be reduced, and the service life of the sizing agent can be prolonged. An electrode printed through the modified silver thick film sizing agent achieves great height, low body resistance and higher mechanical strength after being sintered. Therefore, not only the modified silver thick film sizing agent disclosed by the invention improves the mechanical strength of the electrode of the cell, but also fill factors (FF) of the cell are increased, the series resistance is reduced, the optical conversion efficiency is improved, and the cell can be enabled to achieve good balance of comprehensive electrical property and mechanical performance.
Owner:上海太阳能工程技术研究中心有限公司

Heterojunction solar cell with selective emitting electrode and manufacturing method thereof

The invention discloses a heterojunction solar cell with a selective emitting electrode and a manufacturing method of the heterojunction solar cell. The heterojunction solar cell comprises an N-type crystalline silicon substrate, a front-face intrinsic amorphous silicon layer, a light doped P-type amorphous silicon layer, a front-face transparent conducting film layer, a front-face silver grid electrode, a heavy doped P-type amorphous silicon layer, a back-face intrinsic amorphous silicon layer, a heavy doped N-type amorphous silicon layer, a back-face transparent conducting film layer and a back-face silver grid electrode, and the N-type crystalline silicon substrate is provided with a front face and a back face. The heavy doped P-type amorphous silicon layer is adopted as the selective emitting electrode, is arranged at the contact position of the front-face transparent conducting film layer and the light doped P-type amorphous silicon layer and is provided with a plurality of heavy doped P-type amorphous silicon monomers, and the heavy doped P-type amorphous silicon monomers correspond to grid wires of the front-face silver grid electrode one to one and are located under the corresponding grid wires respectively. The heavy doped N-type amorphous silicon layer is deposited on the lower surface of the back-face intrinsic amorphous silicon layer. According to the solar cell and the manufacturing method, recombination of current carriers can be reduced, absorption of the emitting electrode on the current carriers is reduced, and therefore open-circuit voltages and short-circuit currents are improved, and the efficiency of the heterojunction cell is improved.
Owner:TRINA SOLAR CO LTD

Preparation method of dacron fabric compound antistatic agent

The invention discloses a preparation method of a dacron fabric compound antistatic agent and belongs to the technical field of textile. The preparation method comprises the following steps: firstly, dropwise adding absolute ethyl alcohol and phosphorus pentoxide into a flask; mixing and stirring the mixture and heating and sealing the mixture for stirring reaction; after reaction, dropwise adding deionized water and stirring the mixture to obtain a reaction liquid 1; then adding dimethyl diallyl ammonium chloride and the like into the flask; dropwise adding normal butanol; adjusting the pH value by using sodium hydroxide to obtain a reaction liquid 2; then adding dimethyl diallyl ammonium chloride and the like into a three-mouth flask; stirring the mixture and adding ammonium persulfate to induce a reaction; then supplementing glycidyl acrylate and the like; after reaction, obtaining a reaction liquid 3; and mixing the reaction liquid 2 with the reaction liquid 3 to obtain the dacron fabric compound antistatic agent. The compound antistatic agent prepared by the method does not change color if being used at a high temperature, is stable in performance, and not only can remarkably improve the antistatic performance of the dacron fabric, is lasting in antistatic property, but also is non-irritant and healthy and safe.
Owner:揭阳市庆兴化纤实业有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products