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SOI dynamic threshold transistor

A dynamic threshold and transistor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of reducing the cut-off frequency and oscillation frequency of the device, affecting the radio frequency performance of the device, etc., to reduce parasitic capacitance, improve radio frequency performance, and reduce power consumption. applied effect

Active Publication Date: 2015-02-18
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

SOI dynamic threshold transistors generally implement dynamic threshold control by connecting the gate to the body contact region. Then, the body contact region will increase the parasitic effects of the device, such as parasitic resistance and parasitic capacitance, which will affect the RF performance of the device, especially The oscillation frequency reduces the cut-off frequency and oscillation frequency of the device. How to improve the frequency characteristics of the device has always been the research focus of the device.

Method used

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Embodiment Construction

[0040] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0041] see Figure 1 to Figure 3 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic concept of the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and t...

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Abstract

The invention provides an SOI dynamic threshold transistor which comprises a semiconductor substrate, a first multi-interdigital gate structure, a second multi-interdigital gate structure, a body contact region, a source region, a drain region and a first contact hole. A grid electrode is connected with the body contact region through the first contact hole. By the adoption of a body contact region sharing method, the utilization rate of the body contact region can be increased, and parasitic capacitance can be lowered; meanwhile, by the adoption of a multilateral connection mode, low gate resistance can be obtained. When a device is in a cut-off state, the threshold of the device is high, and the leaked current is low; when the device is in an on state, the threshold voltage of the device is lowered and the current is increased under the influence of the bulk effect. As a result, the device can have a steep sub-threshold slope and a large saturation current; meanwhile, the working voltage of the device is low, and the device is quite suitable for application at low power consumption. By the adoption of the design method, a parasitic resistor and a parasitic capacitor can be improved, and the SOI dynamic threshold transistor has certain application value in the radio frequency application field.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to an SOI dynamic threshold transistor. Background technique [0002] With the continuous development of semiconductor technology, metal-oxide-semiconductor field-effect transistors (MOSFETs) are widely used in integrated circuit design. For handheld applications, such as mobile phones, music players, tablet computers, etc., lower power consumption can greatly extend the use time of the device. Silicon-on-insulator technology (SOI), due to the buried oxide layer, has low parasitic capacitance, and the direct frequency of the device is higher than that of bulk silicon technology. Moreover, SOI technology realizes full dielectric isolation of a single device, eliminating the latch-up effect, and Low leakage current, very suitable for low power consumption, high performance applications. At the same time, the emergence of dynamic threshold transistors greatly reduces th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/78
CPCH01L29/0684H01L29/4232H01L29/7831
Inventor 陈静吕凯罗杰馨柴展何伟伟黄建强王曦
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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