Restrictive value delivery method and device applied to thread-level speculative parallelism

Abstract

The invention provides a restrictive value delivery method and device applied to thread-level speculative parallelism, and when a conflict happens, the total execution time of a system can be reduced in a method of value delivery, i.e. a conflict thread can receive needed data only when a specific condition is met, and otherwise execution is conducted only according to the mode of the original system. The method disclosed by the invention is a lightweight class value delivery method, and compared with a complete value delivery and value prediction method, the method has the advantage of low hardware and protocol complexity, but under an ordinary condition, the performance is inferior to that of complete value delivery and value prediction. Through experimental data analysis, compared with a value prediction model, a restrictive value delivery model does not have large performance loss. The device is realized and verified on a LogSPoTM model, and is also suitable for other thread-level systems.

Description

Technical field [0001] The invention belongs to the field of computer microprocessor structure design, and particularly relates to a lightweight value transfer method and device that can effectively improve the performance of a multithreaded system. Background technique [0002] Speculative multi-threading technology and transaction storage technology [0003] With the advent of the era of multi-core chips (Chip Multi-Processor, CMP), how to thread serial programs that are traditionally difficult to parallelize to speed up the execution of a single program, while also providing more for more and more computing cores on the chip The computing tasks that can be executed in parallel to improve the utilization of on-chip resources have become a hot research issue of common concern in academia and industry. [0004] In order to develop more thread-level parallelism available on multi-core chips and solve the complexity and performance constraints brought by parallel program correctness m...

AI Technical Summary

Problems solved by technology

If you want to completely transplant this idea into the general directory structure, the state transition diagram will become more complicated than the bus structure, which is basically impossible to achieve in the real system

Finally, DATM adds a relatively large hardware cost to the general transaction storage system, which is also unwilling to accept by processor manufacturers.

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