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Device and method for generating functional simulation model of processor, and functional verification method

A technology for functional simulation and generation of devices, applied in the field of integrated circuit design, can solve problems such as spending a lot of time on functional simulation models and spending several months, saving development time and avoiding a large number of errors.

Active Publication Date: 2012-11-21
JIANGSU RUNIC TECH CO LTD
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  • Claims
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Problems solved by technology

Generally speaking, not only the development process takes several months, but also a lot of time is spent on the verification of the correctness of the functional simulation model

Method used

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  • Device and method for generating functional simulation model of processor, and functional verification method
  • Device and method for generating functional simulation model of processor, and functional verification method
  • Device and method for generating functional simulation model of processor, and functional verification method

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Embodiment Construction

[0046]The present application will be described in further detail below through specific embodiments in conjunction with the accompanying drawings.

[0047] This embodiment first introduces a processor function simulation model, and then introduces a generating device for generating the function simulation model. (In this application, the processor function simulation model is also referred to as the function simulation model.)

[0048] see figure 1 , the processor function simulation model mainly includes a data structure declaration unit 10 , a register initialization unit 20 , an input processing unit 30 , a function simulation unit 40 and a simulation result output unit 50 .

[0049] Data structure declaration unit 10: respectively connected to register initialization unit 20, input processing unit 30, function simulation unit 40, and simulation result output unit 50; used to declare the number of registers and the name and data bits of each register according to the regi...

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Abstract

The invention discloses a device for generating a functional simulation model of a processor, which comprises a register configuration module, a command set configuration module, an input processing unit generating module, a functional simulation unit generating unit, a simulation result configuration module, a simulation result output unit generating module and a command function library. After the generating device provided by the invention is adopted, the functional simulation model which meets the simulation function requirement can be automatically generated and the possibility of a great amount of errors caused by completely manual development is avoided; meanwhile, after an automatic generating method disclosed by the invention is adopted, the development time of the functional simulation model is also greatly saved.

Description

technical field [0001] The present application relates to the field of integrated circuit design, in particular to a processor instruction-level function simulation model and its automatic generation device, and a processor function verification method. Background technique [0002] The logical functions and performance indicators of processor hardware design mainly depend on the code quality written by hardware designers using hardware description language, and the correctness of the processor usually needs to be verified before practical application. With the increasing complexity of processors, the complexity and workload of processor verification work has risen exponentially, and the reliance on and requirements for verification are getting higher and higher. As part of the design process, verification plays an increasingly critical role, and the workload of verification is relatively large, which may account for about 70% of the entire design workload. The efficiency an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
Inventor 谢峥陈旭王新安苏吉婷李世军周芝丽胡子一张兴
Owner JIANGSU RUNIC TECH CO LTD
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