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Multi-channel inter-integrated circuit (I2C) controller based on field programmable gate array (FPGA)

A controller and multi-channel technology, applied in the field of communication, can solve problems such as delay increase and increase, and achieve the effect of large bandwidth, large transmission bandwidth, and high resource utilization

Active Publication Date: 2012-12-26
BANGYAN TECH
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Problems solved by technology

When there are too many devices connected to the bus, the probability of conflict will increase, and the delay for devices to obtain bus arbitration will increase accordingly, which is not conducive to the situation with high real-time requirements

Method used

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  • Multi-channel inter-integrated circuit (I2C) controller based on field programmable gate array (FPGA)
  • Multi-channel inter-integrated circuit (I2C) controller based on field programmable gate array (FPGA)
  • Multi-channel inter-integrated circuit (I2C) controller based on field programmable gate array (FPGA)

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Embodiment Construction

[0016] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0017] There are mainly two methods to improve the real-time performance of data transmission on the I2C control bus. The first method is to increase the transmission rate of the I2C control bus. However, the working rate of the general I2C controller is set to an upper limit after leaving the factory. The second is to connect controllers that do not need to communicate with each other to different I2C buses managed by the same processor. However, the processor in the above-mentioned second method has a higher demand for management of multiple I2C buses, and requires higher I2C concurrent operations and data read and write efficiency.

[0018] The FPGA-based multi-channel I2C controller of the present invention has I2C controller read and write port arbitration and inter-buffer pointer management. Please also refer to Figure 1-4 , ...

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Abstract

The invention discloses a multi-channel inter-integrated circuit (I2C) controller based on a field programmable gate array (FPGA). The multi-channel I2C controller comprises a central processing unit (CPU) interface, a buffering section, an arbiter and an I2C controller, wherein the buffering section comprises a sending buffering section and a receiving buffering section; the arbiter comprises a writing state machine and a reading state machine and is used for arbitrating a request signal of the I2C controller; and the buffering section is used for buffering data written or read by the I2C controller and written or read by a CPU and comprises a pointer manager for metering data reading or writing.

Description

technical field [0001] The present invention relates to the communication field, in particular to an FPGA (Filed Programmable Gate Array) multi-channel I2C (Inter-Integrated Circuit) controller, in particular to using the FPGA to realize efficient data transmission by multiple I2C controllers. Background technique [0002] I2C control bus is one of the most mature bus standards. It is a special form of synchronous communication. It has the characteristics of less interface lines, simple control mode, small device package and high communication rate. It has been widely used in the field of industrial control. application. [0003] In the prior art, on the I2C control bus, each I2C controller connected to the bus can initiate data transmission, and the data is prevented from being destroyed through collision detection and arbitration. When there are too many devices connected to the bus, the probability of conflicts will increase, and the delay for devices to obtain bus arbit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/26
Inventor 高胜刘增华
Owner BANGYAN TECH
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