Method for forming novel chip back-side TSV (through silicon via) structure
A through-silicon via and backside technology, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of affecting the quality of the insulating layer and insufficient coverage of the insulating layer, and achieve the effect of reducing the roughness of the hole wall and improving the smoothness
Inactive Publication Date: 2013-01-30
JIANGYIN CHANGDIAN ADVANCED PACKAGING CO LTD
View PDF4 Cites 1 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
These hole wall corrugations and lateral indentations will lead to insufficient coverage of the subsequent insulating layer and affect the quality of the insulating layer.
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0030] see image 3 , a novel through-silicon hole structure on the back of a chip in the present invention, which includes a chip body 1 and a chip electrode 2 arranged on the front side of the chip body 1. The bottom of the through-silicon via 101 reaches the lower surface of the chip electrode 2 directly.
[0031] A novel method for forming a through-silicon via structure on the back of a chip according to the present invention, the process of which is as follows:
[0032] Step 1: Take the chip body 1 and the carrier 3 with the chip electrode 2, and bond the carrier 3 and the front side of the chip body 1 through a bonding process. Due to different practical applications, this bonding can be permanent. That is, it becomes an integral part after bonding; it can also be temporary, that is, the carrier is bonded to the wafer or chip body 1 only for the temporary needs of the process, and finally separated from the wafer chip body 1; the bonding method can be colloid Bonding,...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention relates to a method for forming a novel chip back-side TSV structure, which belongs to the technical field of semiconductor chip package. The novel chip back-side TSV structure comprises a chip body (1), and a chip electrode (2) arranged on the front side of the chip body (1), wherein a TSV (101) formed by two dry etching steps is arranged on the back side of the chip body (1); the TSV (101) has a horn-shaped structure with a large outer section and a small inner section; and the bottom of the TSV (101) reaches the lower surface of the chip electrode (2). The horn-shaped TSV (101) formed by the method provided by the invention has high wall smoothness, eliminates the defects of wall corrugation and lateral recession, and has good process compatibility, thereby facilitating the subsequent steps of covering an intact insulation layer and filling metal in the hole.
Description
technical field [0001] The invention relates to a method for forming a through-silicon hole structure on the back of a chip, and belongs to the technical field of semiconductor chip packaging. Background technique [0002] With the development of semiconductor technology, through-silicon via interconnection technology has emerged, that is, to redistribute electrodes or lines in the vertical direction (Z-axis direction) with metal-filled through-silicon vias, so as to realize the interconnection transfer from one side of the chip to the other side, combined with The rewiring technology on the plane (X, Y plane) enables the interconnection to be carried out in the entire X, Y, and Z directions; through silicon via interconnection technology, the flexibility of packaging is greatly increased, and at the same time, conditions are created for three-dimensional stack packaging . [0003] TSV interconnection generally includes TSV fabrication, insulating layer formation, and metal...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
Inventor 陈栋张黎胡正勋陈锦辉赖志明
Owner JIANGYIN CHANGDIAN ADVANCED PACKAGING CO LTD