Chip-array-based on-line loading system and loading method thereof
A chip array and loading system technology, which is applied in the direction of program loading/starting, general stored program computer, program control device, etc., can solve the problems of increased working time, poor maintainability, waste of resources, etc., and achieves the goal of improving efficiency and shielding differences Effect
Active Publication Date: 2015-04-08
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
View PDF4 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0004] (1) Low flexibility and poor maintainability
If there are many chips that need to be debugged and configured, each chip needs to be interconnected and loaded separately, which increases the working time
[0005] (2) Serious waste of resources
If you need to load different types of chips, you need multiple JTAG emulators, which increases the complexity of the system
[0006] (3) Difficulty loading online
Since each chip is on a different model block, manual support is required for loading, and it is impossible to realize automatic switching of software and online loading
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0028] The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings to describe the technical solution of the present invention in detail.
[0029] Such as figure 1 Shown, the online loading system based on chip array of the present invention comprises PC, JTAG emulator, main control FPGA chip array, at least two mixing modules (i.e. the first mixing module, the second mixing module), one end of JTAG emulator and PC connection, specifically, one end of the JTAG emulator is connected to the PC through the parallel port of the PC, and the other end of the JTAG emulator is connected to an IO (input and output) port of the first register reg_0 of the master FPGA chip array. The mixing module and the second mixing module are connected with the main control FPGA chip array. Each hybrid module has a chipset (the first chipset and the second chipset), the chipset includes an FPGA chip, a DSP chip and a CPU chip, the FPGA chip is an ...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a chip-array-based on-line loading system and a loading method thereof. The loading system comprises a personal computer (PC) and the like, wherein one end of a joint test action group (JTAG) emulator is connected with the PC, and the other end of the JTAG emulator is connected with one input / output (IO) port of a main control field-programmable gate array (FPGA) chip array; a first mixing module and a second mixing module are connected with the main control FPGA chip array; each mixing module is provided with a chip group; the chip group comprises an FPGA chip, a digital signal processing (DSP) chip and a central processing unit (CPU) chip; the FPGA chip is provided with a third JTAG interface; the DSP chip is provided with a fourth JTAG interface; the CPU chip is provided with a fifth JTAG interface; the third JTAG interface, the fourth JTAG interface and the fifth JTAG interface are respectively connected to three IO ports of the main control FPGA chip array; and the main control FPGA chip array comprises a first register and the like. By the system, different types of chips are loaded with configuration data.
Description
technical field [0001] The invention relates to an online loading system and method, in particular to an online loading system and method based on chip arrays. Background technique [0002] The JTAG (Joint Test Action Group, Joint Test Action Group) interface is a test standard (IEEE 1149.1-1990) developed by the Joint Test Action Group of the IEEE Technical Committee, which enables users to test the logic of the device and the PCB (printed circuit board) ) on the internal connections of each device. At present, it is the most popular ICE technology in the world, and many chip manufacturers have added JTAG interface in their products to facilitate user debugging. [0003] The common practice of the existing JTAG debugging technology is to use the JTAG emulator to communicate with the target system FPGA (Field-Programmable Gate Array) / CPU (Central Processing Unit) / DSP (Digital Signal Processing, Digital Signal Processing, Signal processing) connection, and the other end is ...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/445G06F15/76
Inventor 羿昌宇吴玉宁
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST