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flash interface circuit

A technology of interface circuit and FLASH memory, applied in information storage, static memory, instrument, etc., can solve the problems of few non-contact smart cards, small and large FLASH area, etc.

Active Publication Date: 2015-11-18
NO 15 INST OF CHINA ELECTRONICS TECH GRP
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Problems solved by technology

[0002] In the design of chips in the smart card industry, especially for the design of non-contact smart card chips with high requirements for low power consumption, and in the design of storage devices, mature designs generally use EEPROM as the storage unit because of its low power consumption and read / write The circuit design is simple, but the disadvantage is that the area is larger
[0003] FLASH has a small area, but because of its high power consumption, it is rarely used in contactless smart card products

Method used

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Embodiment Construction

[0015] See attached figure 1 , a FLASH interface circuit, which is installed between the CPU and the FLASH memory, it includes: data register 1, read and write address register 2, enable signal generating circuit 3, width configuration register A4, width configuration register B5, width configuration register C6, comparison selection circuit 7, counter A8, counter B9, counter C10, comparison circuit A12, comparison circuit B13, comparison circuit C14, counter D15, pulse generator A16, pulse generator B17, pulse generator C18, comparison circuit D19 and Pulse generator D20;

[0016] Its connection relationship is: the data register 1 and the read-write address register 2 are respectively connected between the CPU and the FLASH memory; The counter C10 and the counter D15 are connected; one end of the width configuration register A4 is connected with the CPU, and the other end is divided into two paths, one path is connected with the comparison selection circuit 7, and the other...

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Abstract

The invention belongs to the technical field of intelligent card control and particularly relates to a circuit for an FLASH interface. The invention adopts the following technical scheme: A, a CPU (central processing unit) needs to set the pulse signal width of a wide configuration register firstly; B, data and addresses are written in the corresponding ports of an FLASH memory through a data register (1) and a read-write address register (2) by the CPU; and C, time is controlled in a form of the pulse width by the width configuration register, the comparison operation is carried out through a comparison circuit and a counter, the level holding state is ended to form a pulse by a pulse generator when the count value of the counter reaches the set pulse width, at the moment, the FLASH memory performs the corresponding function, and an enable signal is sent to the FLASH memory for ending the operation by the pulse generator D (20) when the maximum pulse width is obtained by the comparison circuit D (19). The circuit has the characteristics of low power consumption and small area.

Description

technical field [0001] The invention belongs to the technical field of smart card control, in particular to a circuit for a FLASH interface. Background technique [0002] In the design of chips in the smart card industry, especially for the design of non-contact smart card chips with high requirements for low power consumption, and in the design of storage devices, mature designs generally use EEPROM as the storage unit because of its low power consumption and read / write The circuit design is simple, but the disadvantage is that the area is larger. [0003] FLASH has a small area, but because of its high power consumption, it is rarely used in contactless smart card products. Contents of the invention [0004] The purpose of the present invention is to provide a circuit for the FLASH interface, which has the characteristics of low power consumption and small area; [0005] The technical scheme of the present invention is: a kind of FLASH interface circuit, and it is inst...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/06
Inventor 吴歌邓宝松
Owner NO 15 INST OF CHINA ELECTRONICS TECH GRP
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