Trench Insulated Gate Field Effect Transistor Structure for Electrostatic Protection
A field effect tube and electrostatic protection technology, applied in circuits, electrical components, electric solid devices, etc., can solve the problems of high trigger voltage of IGBT devices and failure to protect internal circuits, etc., to reduce turn-on voltage, improve discharge current capability, The effect of increasing the gate capacitive coupling circuit
Active Publication Date: 2015-08-19
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
[0004] The technical problem to be solved by the present invention is to provide a trench type insulated gate field effect transistor structure for electrostatic protection, which can solve the problem that the trigger voltage of IGBT devices is too high to protect the internal circuit when used for electrostatic protection
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[0017] Such as figure 2 Shown is the first embodiment of the trench-type insulated gate field effect transistor structure used for electrostatic protection in the present invention, including an N-type epitaxial layer, and a plurality of P-type wells are formed on the top of the N-type epitaxial layer, and a plurality of P-type wells are formed on the top of the N-type epitaxial layer. The wells are separated by trenches; gate oxide layers are formed in each trench, and polysilicon gates are filled in the gate oxide layers, and the gate oxide layers and polysilicon gates in each trench constitute the gate of a field effect transistor; each P-type There are two N-type active regions adjacent to the trench in the well as the source of the field effect transistor; the two N-type active regions in the P-type well are separated by a P-type active region, and the P-type active The area is used as the connection end of the P-type well, which is connected to the source on the outside...
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The invention discloses a groove type insulated gate field effect transistor (FET) structure used for electrostatic protection. The groove type insulated gate FET structure used for the electrostatic protection comprises an N-type epitaxial layer, wherein multiple P-type wells are formed in the top portion of the N-type epitaxial layer, and the P-type wells are isolated from one another. Two N-type active regions are formed in each P-type well and isolated from each other through a P-type active region. Grid electrodes are arranged among the P-type wells. The two N-type active regions in each P-type well are in short circuit connection with each other and are connected with the P-type active region in the P-type well. The grid electrodes are in short circuit connection with one another, wherein the N-type active regions in one P-type well are connected with the grid electrodes and connected with a grounding terminal through a resistor, and the N-type active regions in the other P-type wells are directly connected with the grounding terminal. According to the groove type insulated gate FET structure used for the electrostatic protection, structural units of an existing groove type insulated gate FET are optimized and combined from circuits, a gate capacitance coupling circuit is additionally arranged, and therefore the purposes that the start voltage of the FET is lowered, and the current discharging abilities of components are enhanced are achieved.
Description
technical field [0001] The invention relates to a trench type insulating gate field effect transistor, in particular to a trench type insulating gate field effect transistor structure for electrostatic protection. Background technique [0002] Existing Trench Insulated Gate Field Effect Transistor (IGBT) units such as figure 1 As shown, it includes an N-type epitaxial layer, and a plurality of P-type wells are formed on the top of the N-type epitaxial layer, and the plurality of P-type wells are respectively separated by trenches; a gate oxide layer is formed in the trenches, and a gate oxide layer is formed in the gate oxide layer. The polysilicon gate is filled to form the gate of the field effect transistor; there is an N-type active region in the P-type well on both sides of the trench as the source of the field-effect transistor; the P-type well is adjacent to the N-type active region There is also a P-type active region used as the connection terminal of the P-type we...
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IPC IPC(8): H01L27/02H01L29/78
Inventor 苏庆
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP