System and method for hardware LZ77 compression implementation
A technology for implementing systems and methods, applied in electrical components, code conversion, etc., can solve problems such as occupying large CPU resources and inability to obtain high-efficiency parallel operations, and achieve the effects of ensuring performance, improving efficiency, and improving efficiency
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[0071] Hereinafter, the present invention will be fully and detailedly described and illustrated with an exemplary embodiment of the present invention with reference to the accompanying drawings.
[0072] Figure 1A It is a schematic diagram of the compression realization system of the hardware LZ77 of the present invention. Such as Figure 1A As shown, the system includes:
[0073] Data is written into the cache module 100, and the data to be compressed is cached;
[0074] The compression processing module 200 uses a ping-pong operation to extract the data to be compressed, and alternately uses a hash table and a dictionary linked list to compress and encode it;
[0075] The splicing processing module 300 performs splicing processing on the non-fixed-length data in the compressed coded data;
[0076] The data read cache module 400 caches compressed data and spliced data.
[0077] Further, the data write cache module 100 includes:
[0078] The data to be compressed is ...
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