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semiconductor manufacturing method

A semiconductor and device technology, applied in the field of manufacturing semiconductor memory, can solve the problems of increased leakage current reading current, difficulty in reading data accurately, and reducing the speed of reading data, etc.

Active Publication Date: 2016-02-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although lowering the supply voltage reduces the amount of read current, it causes the leakage current to increase relative to the read current
The increased leakage current compared to the read current makes it difficult to accurately read data from the memory cell and also slows down the speed at which data can be read from or written to the bit cell

Method used

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  • semiconductor manufacturing method
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Embodiment Construction

[0028] The following description of exemplary embodiments is to be read in conjunction with the accompanying drawings, which are considered a part of this entire specification.

[0029] An advantage of the improved semiconductor memory described herein is to provide higher operating speeds with less leakage. The advantages brought about by the improved semiconductor memory disclosed herein are provided without requiring additional footprint on the semiconductor substrate.

[0030] In some embodiments, a memory bitcell includes a latch, a write port connected to the latch, and a read port connected to the latch. The write port includes a first set of devices having a first threshold voltage and a second set of devices having a second threshold voltage, the second threshold voltage being greater than the first threshold voltage. The read port includes a third group of devices having a third threshold voltage that is less than the first threshold voltage.

[0031] In some embod...

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Abstract

A memory bit unit includes: a latch, a write port connected to the latch, and a read port connected to the latch. The write port includes a first set of devices having a first threshold voltage and a second set of devices having a second threshold voltage greater than the first threshold voltage. The read port includes a third set of devices having a third threshold voltage less than the first threshold voltage. The invention also provides a semiconductor manufacturing method.

Description

technical field [0001] The method relates to semiconductor memory. More specifically, the disclosed methods relate to methods of fabricating semiconductor memories. Background technique [0002] Static Random Access Memory ("SRAM") includes a plurality of cells arranged in rows and columns to form an array. A conventional SRAM cell includes a plurality of transistors connected to bit lines and word lines for reading one bit of data and writing one bit of data to the memory cell. With the continuous reduction of the size of the SRAM cell, the power supply voltage VCC is generally reduced in order to reduce the power consumption of the device. Although lowering the power supply voltage reduces the amount of read current, it causes the leakage current to become larger relative to the read current. The increased leakage current compared to the read current makes it difficult to accurately read data from the memory cell, and also reduces the speed at which data is read from or...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/413H01L21/8244
CPCG11C11/413H01L27/0207G11C11/412H10B10/12
Inventor 廖忠志
Owner TAIWAN SEMICON MFG CO LTD