Internal storage static state partition and virtualization method

Abstract

The invention provides an internal storage static state partition and virtualization method which comprises that when a virtual address translation is conducted, a true launch bar (TLB) table is inquired, if the virtual address hits the target in the table, a machine address corresponding to the virtual address is directly confirmed according to a page frame number of a page table item in the TLB table; and if the virtual address does not hit the target in the table, a missing processing flow of the TLB is switched to. In the missing processing flow of the TLB, a physical address is acquired from the virtual address; then a machine address corresponding to the physical address is calculated through address offset of a virtual machine, wherein the address offset of the virtual machine is stored in a control register of a virtual machine; and then the machine address is filled in the TLB. The address offset of the virtual machine is the address offset of the virtual machine, wherein the address offset of the virtual machine is stored in the control register of the virtual machine.

Description

technical field [0001] The present invention relates to the field of computer design, and more specifically, the present invention relates to a virtualization method for static memory division. Background technique [0002] Memory virtualization is to add a layer of mapping relationship on the basis of virtual address to physical address mapping, so that the virtual address is mapped to the virtual physical address, and then the virtual physical address is mapped to the physical address, and at the same time, each virtual machine (Virtual Machine, VM ) all think that they run independently on virtual physical addresses starting from 0. [0003] There are many ways to implement memory virtualization. From the perspective of memory allocation, there are two forms: dynamic allocation and static allocation. Existing commercial or open-source virtual machine managers (VMMs) on X86 use dynamic allocation to realize memory virtualization. When the virtual machine needs memory, it ...

AI Technical Summary

Problems solved by technology

[0007] X86 based on NPT or VT hardware has high performance overhead: After the hardware provides these interfaces, it does not need to use shadow page tables, nor does it need to modify the virtual machine kernel, making memory virtualization completely transparent to virtual machines, but the introduction of such interfaces leads to bypass After the translation lookaside buffer (TLB) is missing (Miss) (in this manual, the bypass translation buffer miss is referred to as "TLBMiss"), the number of memory accesses during filling is greatly increased, and the TLB performance overhead of the virtual machine is relatively large.

[0008] The method based on the shadow page table has a large space overhead: specifically, for each page table managed by the virtual machine kernel, another copy of the shadow page table of the page table needs to be constructed and provided to the hardware. This method makes the page table occupy double the space

Images