Communication method and system based on PCIe (peripheral component interconnect express) data exchange

Abstract

The invention discloses communication method and system based on PCIe (peripheral component interconnect express) data exchange. The method includes the steps of firstly, starting a PCIe switch and subjecting a processor and a PCIe terminal communicated with the PCI3 switch to PCIe equipment search and configuration; secondly, allowing the processor or PCIe terminal to transmit a PCIe read-write request to a port of the PCIe switch according to routing information, allowing the port to structure the PCIe read-write request into a data packet by means of packet format compatible with standard PCIe link layer protocol and extensible routing compatible with standard PCIe routing, and transmitting the data packet to a corresponding port; and thirdly, allowing the corresponding port to restore the data packet into the PCIe read-write request and transmit the request to the processor or PCIe terminal. Multi-processor communication based on PCIe link is achieved by the extended PCIe protocol, and any topological extensible interconnection networks are established.

Description

technical field [0001] The present invention relates to a communication method and system based on PCIe data exchange, in particular to a data exchange method and a data exchange system in a multiprocessor environment realized by extending the PCIe protocol, and also relates to compatibility with standard PCIe, realizing the PCIe-based I / O device expansion. Background technique [0002] The PCI-Express bus protocol (PCIe for short) inherits from the PCI and PCI-x protocols, and is the mainstream I / O system bus in current computer systems. Compared with PCI and PCI-X, the PCIe bus has a higher high bandwidth. The single-lane unidirectional bandwidth of the PCIe2.0 specification has reached 5Gpbs, and the PCIe3.0 specification has reached 8Gbps. Because it is a serial transmission protocol, the PCIe bus can achieve a long transmission distance, and even a transmission distance of hundreds of meters can be achieved by using an optical module. In addition, the PCIe bus also pr...

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Problems solved by technology

[0006] Physical address routing also has problems. In the PCIe protocol, all devices are required to exist in one memory space. We know that a processor often needs to have 4GB of memory (16GB in a server). If the processor is interconnected, Taking a 64-bit system as an example (the current processor can issue a physical address of up to 40 bits), then the number of processors that can be included is only 2 40 / 4G=2 8 =256

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