Semiconductor structures and methods for preparing tem samples
A semiconductor and sample technology, which is applied in the preparation of semiconductor devices, test samples, semiconductor/solid-state device components, etc. sample, improve accuracy and speed
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[0031] The invention provides a method for preventing silicon damage in a semiconductor device processing technology, in particular a method for preventing silicon surface damage in a high-energy implantation region. The present invention can be used in processes whose technology nodes are less than 22nm, 32 / 28nm, 45 / 40nm, 65 / 55nm, 90nm and greater than 130nm; the present invention can be used in Logic, Memory, RF, HV, Analog / Power, MEMS, CIS, Flash, eFlash and other technology platforms.
[0032] The invention provides a semiconductor structure, especially a semiconductor structure applied in a TEM sample preparation process.
[0033] Next, the semiconductor structure in the present invention will be described.
[0034] The semiconductor structure includes a substrate, a test layer is arranged on the substrate, and a replication layer is also arranged on the test layer.
[0035] The test layer includes the test structures that need to be prepared for TEM samples and the res...
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