Extension of ethernet phy to channels with bridged tap wires

An Ethernet and channel technology, applied in the direction of synchronous signal speed/phase control, shaping network in transmitter/receiver, baseband system components, etc., can solve high power consumption, reduced system throughput, and high complexity of the system And other issues

Inactive Publication Date: 2013-09-11
AVAGO TECH WIRELESS IP SINGAPORE PTE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although OFDM offers several advantages, in some applications, systems using OFDM may suffer from high power consumption and / or high complexity
Furthermore, the throughput of the system may be reduced due to signaling overhead

Method used

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  • Extension of ethernet phy to channels with bridged tap wires
  • Extension of ethernet phy to channels with bridged tap wires
  • Extension of ethernet phy to channels with bridged tap wires

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Embodiment Construction

[0037] Disclosed herein are certain embodiments of inventions including extended Ethernet PHY systems and methods to provide and process debug preambles added to IEEE 802.3 standard Ethernet frames to cope with cables with severe intersymbol interference (ISI) type. In one system embodiment, the preamble is sent by the transmitter, and on the receiver side, synchronization logic is used to establish synchronization (eg, via the determination of the preamble phase). Once preamble synchronization is achieved, the local preamble generator produces the same code as that produced in the transmitter, which is used to debug the Decision Feedback Equalizer (DFE). After debugging, any channel variation can be tracked with the decision value at the output of the DFE. Once the preamble is complete, the transmitter may switch to a normal Ethernet PHY idle signal frame and / or Ethernet data frame, respectively, comprising idle symbols and / or data symbols, respectively. In some embodiments...

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Abstract

The invention discloses extension of an Ethernet phy to a channel with bridged tap wires; in one embodiment, receiving an Ethernet signal over a channel, the Ethernet signal comprising a preamble frame, an idle frame, and a data frame, the preamble frame comprising one or more preamble codes; synchronizing to the Ethernet signal based on the preamble frame; replicating the one or more preamble codes; and training a decision feedback equalizer (DFE) based on the one or more replicated codes, the training enabling the DFE to use decision values at the DFE output to track channel variations.

Description

technical field [0001] The present disclosure generally relates to Ethernet physical layer (PHY) systems and telephony. Background technique [0002] High data rate (eg 100M, 1G, and 10G) Ethernet PHY systems as specified in IEEE802.3 are designed to work on classified cables with predetermined specifications. These classified cables have a moderate amount of intersymbol interference (ISI). Some form of ISI mitigation, especially various forms of Decision Feedback Equalizer (DFE), is often used to prevent ISI. The DFE may include feedforward filters and feedback filters. In order to debug (train) the DFE and other signal processing blocks, the transmitter sends an idle signal before data communication begins. The idle signal is generated by using the longer scrambler specified by IEEE802.3. Use the decisions made at the output of the equalizer to debug the DFE. This method works well on cables classified by IEEE802.3. However, the Ethernet PHY as specified by IEEE802.3...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L27/26H04L25/03
CPCH04L7/041H04L7/08H04L25/0212H04L25/03057H04L2025/03681H04L2025/03783H04B1/10
Inventor 艾哈迈德·奇尼穆罕默德·泰兹贝
Owner AVAGO TECH WIRELESS IP SINGAPORE PTE
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