Method for performing application-oriented test modification to circuit XDL level netlist description by using Perl (Practical Extraction and Reporting Language) and test method

An application-oriented and testing method-oriented technology, applied in special data processing applications, electrical digital data processing, instruments, etc., can solve problems such as poor correctness and effectiveness, and achieve the effect of improving correctness and effectiveness

Active Publication Date: 2013-10-23
HARBIN INST OF TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention aims to solve the problem of poor correctness and effectiveness of the existing application-oriented test modification of circuit XDL-level netlist description, thereby providing a method for application-oriented test modification of circuit XDL-level netlist description using Perl language

Method used

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  • Method for performing application-oriented test modification to circuit XDL level netlist description by using Perl (Practical Extraction and Reporting Language) and test method
  • Method for performing application-oriented test modification to circuit XDL level netlist description by using Perl (Practical Extraction and Reporting Language) and test method
  • Method for performing application-oriented test modification to circuit XDL level netlist description by using Perl (Practical Extraction and Reporting Language) and test method

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specific Embodiment approach 1

[0045] The specific embodiment one, use Perl language to carry out application-oriented test modification method to circuit XDL level netlist description, its method is:

[0046] Use the XDL tool provided by Xilinx to convert the NCD file into an XDL file, then use the Perl language suitable for text processing to modify the XDL file, and finally use the XDL tool to convert the modified XDL file into an NCD file to obtain the final configuration file and complete the alignment Circuit XDL-level netlist descriptions are modified for application-oriented testing.

specific Embodiment approach 2

[0047] Embodiment 2. The difference between this embodiment and the application-oriented test and modification method for circuit XDL-level netlist description using Perl language described in Embodiment 1 is that Perl language is used for circuit XDL-level netlist description. The applied test modification method is specifically:

[0048] Step 1. Use ISE to convert the integrated netlist NCD file into a readable XDL file;

[0049] Step 2. Analyze the XDL file and extract the layout and routing and CLB configuration information with the help of the FPGA Editor tool;

[0050] Step 3, make a user constraint file according to the layout and routing information, namely: UCF file, specify the location of the CLB;

[0051] Step 4: Modify the circuit XDL-level netlist description to obtain the final NCD file for testing.

[0052] Since the test does not modify the original design file or change the original design function, in order to realize the application-oriented test method, ...

specific Embodiment approach 3

[0063] Specific embodiment three, based on the interconnection test method that uses Perl language described in specific embodiment one to carry out application-oriented test modification method to circuit XDL level netlist description,

[0064] The configuration of the LUT in the circuit to be tested is respectively modified to all-AND logic or all-or logic, thereby realizing the interconnection test.

[0065] The content described in this embodiment is the realization of the interconnection test.

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Abstract

The invention discloses a method for performing application-oriented test modification to circuit XDL level netlist description by using Perl and a test method, and relates to a method for performing application-oriented test modification to circuit XDL level netlist description and a test method. The method for performing application-oriented test modification to circuit XDL level netlist description aims to solve the problems that the correctness and validity of a conventional method performing application-oriented test modification to the circuit XDL level netlist are poor. According to the method for performing the application-oriented test modification to the circuit XDL level netlist description and the test method, the XDL tool provided by the Xilinx is used for converting an NCD file into an XDL file, then the Perl suitable for text processing is used for modifying the XDL file, and finally the XDL file subjected to modification is converted into the NCD file through the XDL tool so as to obtain the final configuration file and achieve application-oriented test modification performed to the circuit XDL level netlist description. The method for performing application-oriented test modification to circuit XDL level netlist description and the test method are suitable for performing application-oriented test modification and test to the circuit XDL level netlist description.

Description

technical field [0001] The invention relates to an application-oriented test modification method and a test method for circuit XDL-level netlist description. Background technique [0002] Generally speaking, the basic flow of an FPGA design is divided into the following steps, such as figure 1 Shown: In the above several steps, design inputs such as HDL language and schematic diagrams are translated into logical connections (netlist) consisting of logic gates such as AND, OR, NOT, and basic logic units such as RAM and flip-flops through synthesis tools , and optimize the generated logical connections according to the goals and requirements, thereby generating EDF files (EDA industry standard files). Then carry out functional simulation to verify the function of the design. After the function is satisfied, use the Implement tool to translate the logic netlist output by the synthesis into the hardware primitives of the underlying modules of the selected device, and map the de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/30G06F17/50
Inventor 俞洋刘旺陈诚
Owner HARBIN INST OF TECH
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