Chip protective ring with power decoupling function

Abstract

The invention relates to a chip protective ring with a power decoupling function. The chip protective ring comprises an active region ring and a laminate structure of more than three layers of metal rings, wherein the active region ring is connected with a ground solder pad of a chip, a through hole is formed between two adjacent metal rings, the metal ring on the bottommost layer or the metal ring on the uppermost layer is a single metal ring, the single metal ring is connected with the ground solder pad of the chip, and each metal ring on other layers is a metal double-ring consisting of an inner-side power supply ring and an outer-side ground ring, which are isolated from each other. Through the double-ring structure which is formed by superimposing the power supply ring and the ground ring in a staggering manner, capacitive parasitism is produced between a power supply and the ground, a decoupling capacitance is formed under the situation that no additional chip area is occupied, so that the area for manufacturing the decoupling capacitance inside the chip in the prior art can be reduced.

Description

technical field [0001] The invention relates to the field of application-specific integrated circuit layout design, in particular to a chip protection ring with power decoupling function. Background technique [0002] Chip protection ring refers to the ring structure used to surround the entire chip on the integrated circuit chip. Its function is to protect the chip from physical damage such as static electricity and stress during the process of wafer thinning and dicing. Generally speaking, the guard ring of a chip is composed of metal, through holes and active regions, and its specific implementation rules are defined during chip layout design. [0003] figure 1 and figure 2 It is a schematic diagram of a chip protection ring implementation method in the existing design technology. in, figure 1 For top view. refer to figure 1 , the chip protection ring 101 in the prior art is generally rectangular, and its four corners are chamfered at 135°. In the rectangular area...

AI Technical Summary

Problems solved by technology

A disadvantage caused by this is that the chip protection ring 101 can only protect the chip physically, but cannot be used in the actual work of the chip as a component with other electrical functions.

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