Stress-reduced field-effect semiconductor device and method for forming therefor

Abstract

The invention relates to a stress-reduced field-effect semiconductor device and a method for forming therefor. The field-effect semiconductor device is provided. The field-effect semiconductor device includes a semiconductor body with a first surface defining a vertical direction. In a vertical cross-section the field-effect semiconductor device further includes a vertical trench extending from the first surface into the semiconductor body. The vertical trench includes a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode. Further, a method for producing a field-effect semiconductor device is provided.

Description

technical field [0001] Embodiments of the present invention relate to field effect semiconductor devices having a semiconductor body and a dielectric region extending into the semiconductor body, and more particularly to power field effect semiconductor devices having a dielectric region extending into the semiconductor body, and to methods for generating such a field Methods related to effect semiconductor devices. Background technique [0002] Semiconductor transistors, especially field-effect controlled switching devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs), have been used in a variety of applications including, but not limited to, power supplies and power conversion Switches in appliances, electric cars, air conditioners, and even stereo systems. Especially for power devices capable of switching large currents and / or operating at higher voltages, hereinafter also referred to as on-resistance R...

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