Dispatch method of wafer acceptance testing machine
A technology for testing machines and wafers, which is applied in semiconductor/solid-state device testing/measurement, data processing applications, resources, etc., and can solve problems such as error-prone, time-consuming and labor-intensive
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[0024] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.
[0025] As an embodiment of the present invention, the dispatching method of the wafer acceptable test machine in this embodiment is applied to a host computer with a setting unit, an input sorting unit, a check calculation unit and an output unit, a dispatching system and On a transmission system, the products in this embodiment all refer to wafers, wherein the wafer acceptance test area where the wafer acceptance test machine is located includes an online monitoring test area and a final shipment test area, such as figure 1 shown, including the following steps:
[0026] Step 1, through the setting unit, set the dispatching rules for the online monitoring test area and the final shipment test area for each category of products.
[0027] Among them, the assignment rules for the online monitoring...
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