Optimizing time synchronizing device for multi-channel clock sources

A technology of a time synchronization device and a comparator, which is applied in the direction of synchronization device, synchronization, and clock driven by a synchronous motor, etc., can solve the problems of fluctuation of the second pulse time interval, the adverse effect of the stable operation of the merging unit, and the stability of the time synchronization system. , to achieve the effect of small standard deviation and improved reliability

Inactive Publication Date: 2013-12-18
YANTAI DONGFANG INDUCON AUTOMATION
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  • Abstract
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Problems solved by technology

Such a system puts forward new and higher technical requirements for the time synchronization system: since the sampling pulse of the merging unit is synchronized with the second pulse of the time synchronization system, the fluctuation of the second pulse interval will have an impact on the generation of the sampling pulse of the merging unit, especially When the time synchronization system changes from the punctual state to the synchronous state, the traditional time synchronization system completes the one-time compensation for the error caused by punctuality, resulting in fluctuations in the second pulse interval, which adversely affects the stable operation of the merging unit
[0007] The current mainstream power time synchronization system generally adopts the structure with single-chip microcomputer + FPGA as the core. Through the analysis and calculation of the time source signal, the local clock is reconstructed and the time synchronization signal is output. This process has a strong dependence on the single-chip microcomputer. When the single-chip microcomputer is reset Or when the dog bites, it will temporarily stop the output of the time signal, which will affect the stability of the time synchronization system

Method used

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  • Optimizing time synchronizing device for multi-channel clock sources
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Embodiment 1

[0024] This embodiment is the basic structure of the present invention.

[0025] Such as figure 1 , including a high stability crystal oscillator 1, a single-chip microcomputer 3 and a multiplexer 4; also includes at least two units with the same structure, each unit includes a global positioning system ground receiver 8, a counter 7, a comparator 6 and a register 5, each The second pulse output end of the global positioning system ground receiver 8 in the unit is connected with the event trigger input end of the counter 7, and the count value output end of the counter 7 is connected with the input end of the comparator 6 in the unit, and the built-in value of the comparator 6 For comparison, when the values ​​are the same, the comparator 6 outputs a pulse signal to the multiplexer 4 . The clock output end of the high-stable crystal oscillator 1 is directly connected to the clock input end of the counter 9 in each unit or connected through a phase-locked frequency multiplier ...

Embodiment 2

[0027] This embodiment is a specific optimized structure of the present invention. Such as figure 2 , on the basis of the first embodiment, each unit further includes a state machine 10 and an adder 9 . The input end of state machine 10 is connected to the output end of comparator 6, and comparator 6 is used to start the state cycle of state machine 10; An output end of state machine 10 is connected with the control end of adder 9, is used to start adder 9, the other output terminal of the state machine 10 is connected to the writing control terminal of the comparator 6 to control the writing of the output of the adder 9 into the comparator 6.

[0028] The two input terminals of the adder 9 are respectively connected with the output port of the comparator 6 and the register 5, and are used to add the built-in value of the comparator 6 to the value of the register 5, and the output port of the adder 9 is connected with the data input of the comparator 6. The port is connecte...

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Abstract

The invention relates to an optimizing time synchronizing device for multi-channel clock sources. The optimizing time synchronizing device comprises at least two units identical in structure. In every unit, a global positioning system ground receiver (8) is connected with a counter (7), the counter (7) is further connected with a comparator (6) in the unit, a high-stability crystal oscillator (1) is directly connected with the counter (7) in every unit or connected with the counter (7) in every unit through a phase-locking frequency multiplier (2), and the comparator (6) in every unit is respectively connected with one input end of a multiplexer (4). The counter (7), the comparator (6) and a register (5) in every unit are respectively connected with a single chip microcomputer (3), and the output end of the single chip microcomputer (3) is further connected with the multiplexer (4). The optimizing time synchronizing device has the advantages that the comprehensive cost is low, algorithm adaptability is high, optimization of the multi-channel clock sources is supported, various time difference compensation strategies are supported, high-precision punctuality can be achieved, and time signal output is stable and reliable, and the like.

Description

[0001] technical field [0002] The invention relates to a time synchronization device, in particular to a multi-time source optimization time synchronization device mainly used in the field of electric power system and automation technology. Background technique [0003] During the operation of the power system, the operating state of the power grid changes rapidly. In order to ensure the safety and economic operation of the power grid, various automation devices based on computer technology and communication technology are widely used, such as dispatching automation systems, fault recording devices, microcomputer relays, etc. Electrical protection devices, event sequence recording devices, substation computer monitoring systems, electric energy billing systems, thermal power plant unit automatic control systems, lightning location systems, etc., the normal operation of these systems requires unified time reference support. [0004] Global Positioning System (GPS), as the m...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L7/00G04R20/02G04G7/00
Inventor 华志斌王建伟李勇尹航陈峰超
Owner YANTAI DONGFANG INDUCON AUTOMATION
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