Interconnection method and device for storage system

A technology of system power supply and association relationship, applied in the field of communication, can solve the problems of reducing the effective utilization of hard disk space, reducing the effective utilization of space, and reducing capacity specifications

Inactive Publication Date: 2013-12-25
HUAWEI DIGITAL TECH (CHENGDU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

And it will reduce the effective utilization of hard disk space
For example, in some application scenarios (such as data backup), data mirroring between nodes is required, then the effective utilization of space will be reduced by 50%, which will indirectly lead to an increase in unit capacity cost and a decrease in capacity specifications

Method used

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  • Interconnection method and device for storage system
  • Interconnection method and device for storage system
  • Interconnection method and device for storage system

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Experimental program
Comparison scheme
Effect test

Embodiment 2

[0088] exist figure 2 on the basis of image 3 The schematic diagram of the connection between nodes provided for the second embodiment of the present invention, the first node 20 and the second node 21 of the second embodiment are both based on the traditional x86 server architecture, specifically taking the first node 20 as an example, from the first SAS of the motherboard The controller 203 and the first SAS expander 202 on the backplane respectively divide one SAS channel (cable adapter) to the chassis panel of the first node 20 . adjacent two nodes ( image 3 The first node 20 and the second node 21) are cross-connected through the SAS cable, while retaining the heartbeat signal, for example, the processors of the two nodes can obtain the heartbeat signal through a Gigabit Ethernet (GE) channel. refer to figure 2 , the first interconnected hard disk channel is the channel between the first SAS controller 203 of the first node 20 and the second SAS expander 212 of the...

Embodiment 3

[0096] exist figure 1 on the basis of Figure 4 For the schematic diagram of connection between nodes provided in Embodiment 3 of the present invention, refer to Figure 4 In this implementation, both the first node 20 and the second node 21 are based on the traditional x86 server architecture. Taking the first node 20 as an example, each of the first SAS expander 202 on the backplane is divided into one SAS channel (cable transfer plug) to the chassis panel of the first node 20. Two adjacent nodes (that is, the first node 20 and the second node 21 ) are directly interconnected through the SAS cable, while retaining the heartbeat signal. For example, the processors of the two nodes can obtain the heartbeat signal through the GE channel. The first interconnected hard disk channel is a channel between the first SAS controller 203 of the first node 20 , the first SAS expander 203 of the first node 20 , and the second SAS expander 212 of the second node 21 .

[0097] The first ...

Embodiment 4

[0102] exist figure 1 on the basis of Figure 5 The schematic diagram of connection between nodes provided by Embodiment 4 of the present invention, the control board in the node is implemented in the form of a plug-in frame, and a SAS expansion board is added, all in the form of a plug-in (Field Replacement Unit, FRU for short) module and the back board connection. The first SAS controller 203 (local SAS controller) controlling the motherboard on the first node 20 is first connected to the first SAS expander 202 of the SAS expansion board through the backplane, and then the first SAS expander 202 expands the required number The SAS channel is connected to the first hard disk unit 201 of the first node 20 . At the same time, a third SAS controller (node ​​interconnection SAS controller) is added to the control board, and the standard SAS interface (downstream channel) is output on the chassis panel; the SAS expansion board also outputs the standard SAS interface (upstream ch...

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Abstract

The invention provides an interconnection method and device for a storage system. A first processor is connected with a second processor of a second node to obtain a heartbeat signal of the second processor of the second node and judge whether the second node fails or not according to the heartbeat signal; when the first processor judges that the second node fails according to the heartbeat signal, the first processor can access at least one second hard disk unit of the second node through a first interconnection hard disk channel between the first processor and the second node. The second hard disk unit of the second node can be taken over when the second node fails, so that the normal use of data in the second hard disk unit can be ensured on the premise of not wasting resources of the second node.

Description

technical field [0001] The invention relates to communication technology, in particular to a storage system interconnection method and device. Background technique [0002] In the current era of big data, the distributed storage system presents a unified access space to the outside world by dispersely storing data on multiple nodes. Each node is not only a storage that provides capacity, but also a head that supports front-end access. When the number of nodes reaches a certain number, its performance and capacity will far exceed traditional storage systems, while providing higher reliability and scalability. [0003] In a distributed storage system, a single-control storage server is generally used. If a single-node storage server fails, the hard disk in this node will be inaccessible, seriously reducing data availability. Therefore, improving data availability through software or hardware will become very meaningful in large-capacity nodes. figure 1 It is a schematic dia...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L29/08
Inventor 胡浩
Owner HUAWEI DIGITAL TECH (CHENGDU) CO LTD
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