Single-particle-resistant transient pulse CMOS (complementary metal oxide semiconductor) circuit
A transient pulse and anti-single event technology, which is applied in the direction of pulse technology, logic circuits, electrical components, etc., can solve the problems of high hardware consumption and achieve the effects of small quantity, good filtering effect and low power consumption
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[0030] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0031] figure 1 A schematic structural diagram of a CMOS circuit for anti-single event transient pulse provided by an embodiment of the present invention is shown. This single-event transient-immune CMOS circuit consists of:
[0032] The first buffer 101, its input terminal receives the input signal in, and its output terminal outputs the first buffer signal out1, which is used to eliminate the "low high low" type pulse;
[0033] The second buffer 102, its input terminal receives the input signal in, and its output terminal outputs the second buffer signal out2, which is used to eliminate the "high low high" type pulse;
[0034] The first PMOS transistor 103, the third PMOS transistor 105, the first NMOS transistor 107 ...
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