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Array substrate and preparation method and display device thereof

An array substrate and substrate technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve the problems of high production cost, increased difficulty of TFT array substrate process, low yield rate of TFT array substrate, etc., and achieve simplified patterning process The number of times, the effect of reducing production costs and improving production efficiency

Active Publication Date: 2014-02-05
BOE TECH GRP CO LTD
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Problems solved by technology

And each patterning process includes processes such as film formation, exposure, development, etching and stripping; obviously, the more times of patterning process, the higher the manufacturing cost of TFT array substrate, correspondingly, it will lead to the preparation of TFT array substrate. The increase in process difficulty may cause instability in the performance of the TFT array substrate, that is, the lower the yield of the TFT array substrate

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  • Array substrate and preparation method and display device thereof
  • Array substrate and preparation method and display device thereof
  • Array substrate and preparation method and display device thereof

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[0038] An embodiment of the present invention provides a method for preparing an array substrate 01, such as figure 1 As shown, the preparation method comprises the following three main steps:

[0039] S01 , forming a pattern layer including the pixel electrode 20 , and a pattern layer including the gate electrode 30 and the gate line on the base substrate 10 through a patterning process.

[0040] S02. On the substrate on which the patterned layer including the gate electrode 30 and the gate line is formed, at most two patterning processes are used to form the gate insulating layer 40, at least including the metal oxide semiconductor active layer 50 A pattern layer, and a pattern layer including at least the etching stopper layer 60 .

[0041] Wherein, a first via hole 71 exposing the pixel electrode 20 is formed above the pixel electrode 20 .

[0042] S03. On the substrate formed with the etching stopper layer 60, a pattern layer including the source electrode 80a, the drai...

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Abstract

The embodiment of the invention provides an array substrate and a preparation method and display device of the array substrate, and relates to the technical field of display. According to the array substrate and the preparation method and display device of the array substrate, the times of the composition process can be reduced, and the cost is saved. The method comprises the steps that a pattern layer comprising a pixel electrode, and a pattern layer comprising a gate line and a gate electrode are formed on a substrate through the one-time composition process, a gate insulating layer, a pattern layer at least comprising a metallic oxide semiconductor active layer and a pattern layer at least comprising an etching barrier layer are formed on the substrate through twice composition processes at most, the substrate is provided with the pattern layer comprising the gate electrode and the gate line, a first via hole which exposes the pixel electrode is formed above the pixel electrode, a pattern layer comprising a source electrode, a drain electrode and a data line is formed through the one-time composition process on the substrate provided with the etching barrier layer, the source electrode and the drain electrode are both in contact with a metallic oxide semiconductor, and the drain electrode is electrically connected with the pixel electrode through the first via hole. The method is used for preparing the array substrate, the display device and the like.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display device. Background technique [0002] According to the different materials used in the active layer in the thin film transistor (Thin Film Transistor, referred to as TFT) structure, TFT can be divided into: amorphous silicon TFT, polycrystalline silicon TFT, single crystal silicon TFT and metal oxide semiconductor TFT; among them, Metal oxide semiconductor TFTs have high carrier mobility, which can better meet the driving requirements of ultra-large-sized liquid crystal displays, and metal oxide semiconductor TFTs also have uniform components, low cost, and high transparency. characteristics, so it has attracted the attention of researchers. [0003] In the prior art, when etching the metal layer of the source electrode and the drain electrode above the metal oxide semiconductor active layer, the metal oxid...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77H01L27/12H01L29/786
CPCH01L27/127H01L27/1225H01L21/28008H01L2924/0002H01L21/0274H01L21/31144H01L21/32139H01L29/4908H01L27/1222H01L27/1288H01L29/66969H01L29/7869H01L2924/00H01L21/02565H01L21/441H01L21/469H01L21/47573H01L21/47635H01L21/56H01L21/76831H01L23/3171H01L23/5226H01L23/528H01L27/124H01L27/1259H01L29/24
Inventor 刘翔
Owner BOE TECH GRP CO LTD