Disk frame and storage device with disk frame

Abstract

The invention discloses a disk frame and a storage device with the disk frame. The disk frame comprises an outer frame body and a backboard assembly. The backboard assembly comprises a master backboard and a slave backboard, and both the master backboard and the slave backboard are fixed into the outer frame body, of a strip shape, and same in length direction. The slave backboard is located on one side of the width direction of the master backboard. A gap is formed between the slave backboard and the master backboard. A master signal transmission channel is formed in the master backboard. A sub signal transmission channel is formed in the slave backboard and is used for transmitting signal flows of which the rate is lower than the rate of signal flows in the master signal transmission channel. The backboard assembly is divided into the master backboard and the slave backboard, ventilation can be achieved through the gap between the master backboard and the slave backboard, and therefore ventilation capacity of the whole backboard assembly can be effectively improved, and the heat radiation performance is improved. The master backboard is used for transmitting high-speed signals, and can be made of plates with high quality. The slave backboard is used for transmitting low-speed signals and can be made of plates with poor quality, and therefore cost is effectively lowered.

Description

technical field [0001] The invention relates to the field of storage devices, in particular to a disk frame and a storage device using the disk frame. Background technique [0002] With the development of technology, the demand for storage capacity has exploded. Among the interviewed companies, 68.6% mainly value performance when choosing a storage architecture, and 59.5% value cost more. Due to the pursuit of storage performance by more companies, high-performance PCIe SSDs (solid state drives with PCIe interface standards; PCIe : Peripheral Component Interconnect Express, fast peripheral interconnection standard) The demand for storage is particularly urgent, and since the price of Flash (the key chip that constitutes SSD) has been reduced to an order of magnitude comparable to that of SAS hard drives, it is foreseeable that PCIe SSD There will be more and more applications in primary storage. At present, due to the limitation of the price of PCIe SSD, it has not been ap...

AI Technical Summary

Problems solved by technology

[0004] If a PCIe SSD disk is installed in the disk enclosure, due to the enhanced performance of the PCIe SSD disk, the PCIe signal bandwidth needs to be increased accordingly (that is, the number of PCIe Lanes needs to be increased), which will lead to an increase in the number of connectors from the backplane to the cascading board. If only this point is considered and the connectors to the cascading board are added to the backplane of the original disk enclosure, it is necessary to remove some openings on the backplane and recalculate the opening ratio to 11.45%, which means that the number of openings on the backplane is reduced. Rate

[0005] Because the size of the PCIe disk interface is larger than that of the SAS disk interface, it needs to occupy more space on the backplane. After optimizing the layout of the existing backplane, the PCIe SSD disk backplane can only open a maximum of 12 holes using the original scheme. %, at the cost of sacrificing the stacking of the backplane, and this opening ratio, after thermal design evaluation, cannot meet the thermal design requirements of a 25W PCIe SSD disk

[0006] The main defects of the above existing technologies are: firstly, the existing hardware backplane opening scheme cannot meet the heat dissipation requirements of 25W or higher power PCIe SSD disks, and the bottleneck lies in the opening ratio of the backplane; using the existing backplane scheme, Since increasing the opening needs to take up space on the backplane, it will inevitably increase the difficulty of wiring, which will increase the stacking of the backplane and increase the cost of the backplane. Moreover, high-speed signals need to be routed on the backplane, and the requirements for board materials will be relatively high.

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