Single line serial bus protocol and switching circuit
A serial bus and conversion circuit technology, which is applied in the field of serial bus interface design, can solve the problems of clock and data asynchronous, achieve reliable asynchronous data transmission, and improve the effect of clock and data asynchronous problems
Inactive Publication Date: 2014-02-26
SHAANXI WANDA INFORMATION ENG
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However, this kind of interface usually requires the use of both clock lines and data lines, which may cause clock and data asynchronous problems during transmission.
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[0024] Below in conjunction with accompanying drawing and example the present invention is described in further detail:
[0025] refer to figure 1 , a single-wire serial bus conversion circuit of the present invention, comprising first to fifth D flip-flops D 0 、D 1 、D 2 、D 3 、D 4 And the clock terminal Clock, the set / reset signal terminal RS, and the data input terminal D respectively connected to the five D flip-flops in , control signal terminal Ctr, data output terminal D out , three XOR gates G 6 , G 7 , G 11 , two AND gates G 5 , G 8 , an OR gate G 3 , a multiplexer G 1 and two inverters G 2 , G 4 ;Data input D in via multiplexer G 1 with the first D flip-flop D 0 connected; first D flip-flop D 0 The data input and multiplexer G 1 The output terminal is connected; the data output terminal D out with the second D flip-flop D 1 The output terminal of the original code is connected; the control signal terminal Ctr is divided into two ways, and one way p...
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The invention discloses a single line serial bus protocol and a switching circuit. The single line serial bus protocol and the switching circuit are suitable for data transmission between chips. A circuit interface comprises a clock signal end Clock, a setting / reset signal end RS, a data input end Din, a control signal end Ctr and a data output end Dout. The circuit structurally comprises five D triggers, three exclusive-OR gates, two AND gates, one OR gate, a multiplexer and two phase inverters. The data input end of the D trigger D0 is connected with the output end of the multiplexer; a combinational logic circuit composed of output ends Q of the D triggers D1, D2, D3 and D4 through the exclusive-OR gates, the AND gates and the phase inverters is fed back to the input end D of the D trigger D1, and by means of the loop connection, how high the an output level of an output level of the data output end Dout is and lasting time are controlled according to data received by the data input end Din. According to the single line serial bus protocol and the switching circuit, the logic level can be converted into time domain coding, and the data are transmitted reliably and asynchronously.
Description
technical field [0001] The invention belongs to the field of serial bus interface design, in particular to a single-line serial bus protocol and a conversion circuit. Background technique [0002] At present, the universal serial bus interface is widely used in various external devices, and it has the advantages of fast transmission speed, support for hot plugging and connection of multiple devices. However, this interface usually requires the use of both clock lines and data lines, which may cause asynchronous clock and data problems during transmission. In view of this, it is necessary to develop a single-wire serial bus protocol to transmit data asynchronously and reliably to solve the above problems. Contents of the invention [0003] The purpose of the present invention is to provide a single-wire serial bus protocol and a conversion circuit, which can convert logic levels into time-domain codes, thereby effectively improving the asynchronous problem of clock and dat...
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IPC IPC(8): G06F13/40G06F13/42
Inventor 王兴全雷绍充
Owner SHAANXI WANDA INFORMATION ENG