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Communication method and device for axi bus and ahb bus

A technology of communication device and communication method, applied in the direction of bus network, data exchange through path configuration, general-purpose stored program computer, etc., to achieve the effects of improving flexibility, realizing convenience, and enriching design methods

Active Publication Date: 2016-06-29
SHANDONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The AXI bus is more and more widely used in the design of the on-chip bus, but the AHB bus will not be completely replaced by the AXI bus due to its good interaction with peripherals.

Method used

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  • Communication method and device for axi bus and ahb bus
  • Communication method and device for axi bus and ahb bus
  • Communication method and device for axi bus and ahb bus

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 2

[0058] Application of a communication method between an AXI bus and an AHB bus as described in Embodiment 1: use the above-mentioned communication method between the AXI bus and the AHB bus to mount the AXI bus external device on the AHB bus, or mount the AHB bus external device to the AXI bus.

Embodiment 3

[0060] Such as figure 2 shown.

[0061] A device for realizing communication between an AXI bus and an AHB bus, including a data buffer module, an address information transmission module, a control module, a data writing module and a data reading module;

[0062] The data buffer module: a buffer device for reading and writing data between the AXI bus and the AHB bus using an asynchronous FIFO; the data buffer module is connected to the address information transmission module, the data reading module and the data writing module respectively; it is used for buffering read / write operations address and data information; AXI bus and AHB bus need to have a data buffer device when transmitting data through the communication bridge;

[0063] The address information transmission module: this module completes the buffering of the address and control information from the AXI bus master through the asynchronous FIFO, and simultaneously completes the communication with the control module...

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Abstract

The invention discloses a method for mutual communication between an AXI bus and an AHB bus, which mainly completes the read and write operations between the AXI bus and the AHB bus to realize the communication between the two. After the AXI bus master sends a read and write request, the AXI bus and AHB bus communication bridge latches the read and write address, and keeps the address valid during the transmission process, including the latch of the read and write control signals; then the AXI bus communicates with the AHB bus The bridge decodes the latched address and generates a selection signal. Only one selection signal can be activated during the transmission process, that is, the only AHB slave device is selected for read and write operations; during the write operation, the AXI bus and The AHB bus communication bridge is responsible for sending the data from the AXI bus to the AHB bus through the data buffer; during the read operation, the AXI bus and AHB bus communication bridge is responsible for sending the data on the AHB bus to the AXI bus through the data buffer.

Description

technical field [0001] The invention relates to a method and a device for mutual communication between an AXI bus and an AHB bus, and belongs to the technical field of system-on-chip (SOC) bus design. Background technique [0002] With the development of large-scale integrated circuits and semiconductor technology, SoCs are more and more widely used in various fields. In the classic system design method, the connection between the slave device and the processor is mainly at the board level, and now a large part of it is integrated into the chip, which can avoid many shortcomings of PCB design, such as reducing system power consumption, achieving thinner, purpose of lowering prices. However, the scale and complexity of the entire chip are increasing day by day, and the requirements for chip designers are also increasing, and system designers are faced with many new problems. The key to solving these problems is to have a suitable on-chip bus structure. The AXI bus is the m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/76G06F13/38H04L12/40
Inventor 周莉汪洋孙皓董启凡马召宾陈鹏
Owner SHANDONG UNIV
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