Method for forming self-aligned triple pattern

A self-alignment and graphic technology, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of size limitation and inability to further reduce, and achieve feature size reduction, easy control, position and feature size precise effect

Active Publication Date: 2014-05-14
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] However, the size of the mask formed by the self-aligned double patterning process of the prior art is still limited and cannot be further reduced

Method used

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  • Method for forming self-aligned triple pattern
  • Method for forming self-aligned triple pattern
  • Method for forming self-aligned triple pattern

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Embodiment Construction

[0034] As mentioned in the background, the size of the mask formed by the self-aligned triple patterning process in the prior art is still limited and cannot be further reduced.

[0035] After research by the inventor of the present invention, please continue to refer to figure 2 , the mask formed by the existing self-aligned double patterning process is: in the range where the existing photolithography process can only form a single sacrificial layer 101, the mask sides are respectively formed on both sides of the sacrificial layer 101 wall 103; wherein, the size of the sacrificial layer 101 is limited by the precision of the existing photolithography process, and its size cannot be further reduced; when the mask spacer 103 is formed on both sides of the sacrificial layer 101, it is Within the scope of forming a single sacrificial layer 101, double the number of mask spacers 103 is formed, so the size of the mask spacers 103 is further reduced compared with the size of the e...

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Abstract

Provided is a method for forming a self-aligned triple pattern. The method comprises: providing a layer to be etched, wherein the surface of the layer to be etched is equipped with a discrete first sacrificial layer; forming a second sacrificial film on the surface of the layer to be etched and the sidewall and the top of the first sacrificial layer and forming a first sidewall layer on the surface of the second sacrificial film; planarizing the second sacrificial film and the first sidewall layer until the top surface of the first sacrificial layer is exposed, the first sidewall layer forms a first sidewall, the second sacrificial film forms a second sacrificial layer, and the tops surfaces of the second sacrificial layer and the first sidewall are aligned to the top surface of the first sacrificial layer; removing the first sacrificial layer after a planarization process is executed; forming a second sidewall on the surface of the layer to be etched on the two sides of the second sacrificial layer and the first sidewall; dry etching the second sacrificial layer by using the first sidewall and the second sidewall as a mask until the surface of the layer to be etched is exposed. A formed self-aligned triple pattern has a small size and a simple forming process.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a self-aligned triple pattern. Background technique [0002] With the continuous progress of semiconductor technology, the process nodes of semiconductor devices are continuously reduced. However, due to the limitation of the precision of the existing photolithography process, the mask pattern formed by the existing photolithography process is difficult to meet the demand for continuous reduction of the feature size of semiconductor devices, which hinders the development of semiconductor technology. [0003] In order to further reduce the size of the semiconductor device on the basis of the existing photolithography process, a double patterning process is proposed in the prior art. Among them, the self-aligned double patterning (Self-Aligned Double Patterning, SADP) process is widely used because of its simplicity. [0004] Figure 1 to ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/033H01L21/308
CPCH01L21/0337H01L21/0338H01L21/3086H01L21/3088
Inventor 隋运奇
Owner SEMICON MFG INT (SHANGHAI) CORP
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