Circuit structure for eliminating short circuit currents
A technology for circuit structure and short-circuit elimination, which is applied in the direction of reliability improvement and modification, can solve the problems of inconvenience, increase of power consumption and cost, increase of circuit power consumption and cost, etc., and achieve reduction of power consumption and calorific value, cost and power consumption Low, avoiding the effect of increasing power consumption and cost
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no. 1 example
[0049] The first-level drive circuit 1 includes a PMOS-type third transistor 11 and an NMOS-type fourth transistor 12. The source of the third transistor 11 is connected to the power supply VDD, and the drain is connected to the first-level drive circuit. The first output terminal 103 of 1; the source of the fourth transistor 12 is connected to the signal ground GND, and the drain is connected to the second output terminal 104 of the first-level driving circuit 1; the gate of the third transistor 11 and the gate of the fourth transistor 12 are commonly connected to the first input terminal 101 of the first-level driving circuit 1 .
[0050] The second-level drive circuit 2 includes a PMOS-type fifth transistor 21 and an NMOS-type sixth transistor 22. The source of the fifth transistor 21 is connected to the power supply VDD, and the gate is connected to the second-level drive circuit. 2's first input end (i.e. the first output end 103 of the first-level drive circuit 1); the s...
no. 2 example
[0059] A schematic diagram of a logic "AND" circuit adopting the circuit structure of the present invention, which includes a first-stage drive circuit composed of transistors 81, 82, 83 and 84, a second-stage drive circuit composed of transistors 91 and 92, and a second-stage drive circuit composed of transistors 61 and 62. The first time delay unit composed of, and the second time delay unit composed of transistors 71 and 72;
[0060] The first stage drive circuit is provided with a first input terminal 101, a second input terminal 102, a first output terminal 103 and a second output terminal 104; the first time delay unit and the second time delay unit are located at the first Between the first output terminal 103 and the second output terminal 104 of the stage driving circuit.
[0061] The first delay unit includes a PMOS type first transistor 61 and an NMOS type second transistor 62 .
[0062] The source of the first transistor 61 is connected to the first output termina...
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