Adjustment method for parameters of chips on wafer

Abstract

The invention discloses an adjustment method for parameters of chips on a wafer. The method includes the following steps: step1: grouping all chips on a test wafer into a plurality of test units; step2: measuring a specific parameter of each chip in a specific test unit through a probe card so as to obtain eigenvalues of the parameters of all the chips in the test unit; step3: obtaining a mean value of the eigenvalues of the parameters of all the chips in the test unit and using the mean value of the parameters as an adjustment target value of all the chips in the test unit and at the same time writing the mean value of the parameters into the chips for being used in follow-up tests and normal work so as to complete adjustment of a specific test unit on the test wafer; step4: repeating the step 2 and step3 until adjustment of all test units on the test wafer is completed. The adjustment method for the parameters of the chips on the wafer is capable of ensuring the adjustment accuracy while ensuring large-scale mass production.

Description

technical field [0001] The invention relates to a test method for large-scale integrated circuits, in particular to a method for adjusting chip parameters on a wafer. Background technique [0002] When large-scale integrated circuits are tested, some parameters of the chip often need to be adjusted. Each chip may have many different parameters that need to be adjusted, such as including the chip's reference voltage value, chip's functional voltage value, chip's current value, and chip frequency. Due to production reasons, the eigenvalues ​​of these parameters of the chip may not be within the use range of this parameter, and the parameter values ​​​​of the chip need to be adjusted to within its use range to meet the use requirements. [0003] When trimming, some chips need to be trimmed negatively, while others need to be trimmed positively; according to their eigenvalues, the trimming values ​​of each chip are also different. [0004] However, when large-scale logic testi...

AI Technical Summary

Problems solved by technology

[0004] However, when large-scale logic testing instruments test chips, from the perspective of production, they often use large-scale simultaneous testing, and cannot apply different trimming values ​​to each chip, resulting in the accuracy of trimming in mass production. too low

In order to improve the accuracy of trimming, the parameters of each chip can only be trimmed separately, which will lead to a multiplied increase in test time and cannot meet the needs of mass production

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