Power down protection circuit and storage equipment

Abstract

The invention provides a power down protection circuit which comprises an energy storage unit and a chip selection signal control unit, wherein the energy storage unit is connected with an external power supply and is used for supplying backup power under a power down condition; the chip selection signal control unit is connected with the energy storage unit and is used for transmitting a chip selection signal to an external memory; when the external power supply is normally connected, the chip selection signal control unit transmits a first control signal to the chip selection signal end of the external memory, and the first control signal enables the external memory to be in a normal working state; in a power down state, the chip selection signal control unit transmits a second control signal to the chip selection signal end of the external memory, and the second control signal enables the external memory to be in an ineffective state to keep storage information. Compared with the prior art, the power end and chip selection end of the memory can be in a double-power-supply state; switching of two power supplies can be automatically implemented without a power down detection circuit and meets a high-speed requirement.

Description

technical field [0001] The invention relates to the technical field of data storage, in particular to a power-down protection circuit and a storage device. Background technique [0002] At present, memory is a commonly used and indispensable information storage device in various electronic devices with microprocessor as the core. Among them, static memory has special application value due to its unique performance. As a kind of volatile memory, to protect the integrity of information when power is off, low power consumption, low cost, and long-term power-off protection circuits are essential. [0003] However, there are still many deficiencies in the existing conventional power-down protection circuit methods. For example, the authorized utility model power-down storage memory (patent number: ZL96209364.5) adopts voltage monitoring and RC delay circuit, voltage switching switch and Although the technical solution of the power-down storage circuit composed of SRAM chips has ...

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Problems solved by technology

[0005] 1. The state of the chip select signal in the power-off state is not considered, resulting in high static power consumption of the memory, as described in the patent [ZL96209364.5];

[0006] 2. Although the controlled state of the chip select signal in the power-off state is considered, the work requirements in the normal state are not handled well, and it is not suitable for high-speed storage, which affects the storage speed;

[0007] 3. The power-down protection circuit has a complex voltage detection and control circuit, resulting in a large power consumption;

[0008] 4. Using batteries as backup power supply has limited life and high cost

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