A kind of array substrate and its preparation method, liquid crystal display panel
An array substrate and substrate technology, which is applied in the field of flat panel display, can solve the problems of high preparation cost and complicated preparation process, and achieve the effect of reducing the preparation cost and simplifying the preparation process.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0037] Embodiment 1 of the present invention provides an array substrate, and the schematic structural diagram of the pixel region of the array substrate can be as follows image 3 as shown, Figure 4 for image 3 The cross-sectional schematic diagram of the position of AA' in the middle, combined with the following image 3 and Figure 4 The array substrate provided in this embodiment will be described.
[0038] In this embodiment, the array substrate includes a TFT, and the TFT includes a substrate 11, and a gate 12, a gate insulating layer 13, an oxide semiconductor layer 14, an etching stopper layer 15, and a passivation layer formed sequentially on the substrate. layer 17 and pixel transparent conductive oxide layer 19.
[0039] The substrate 11 can be a transparent substrate, preferably, the substrate 11 can be a transparent glass substrate; the gate 12 can be used to load scanning signals to control the conduction or non-conduction of the oxide semiconductor layer 1...
Embodiment 2
[0058] Embodiment 2 of the present invention provides a method for preparing an array substrate, and the method may include the following steps:
[0059] The first step is to form the gate and the first conductive layer.
[0060] In this step, a metal thin film may be deposited on the substrate 11 , and the gate 12 and the first conductive layer 20 are photoetched on the metal thin film by using a first mask. So far, the gate 12 and the first conductive layer 20 have been formed by using the first mask.
[0061] The second step is to form a gate insulating layer.
[0062] In this step, a gate insulating layer 13 may be deposited and formed on the gate 12 and the substrate 11 . The array substrate formed at this time may be as shown in FIG. 5( a ).
[0063] The third step is to form an oxide semiconductor layer.
[0064] In this step, an oxide semiconductor film can be deposited on the gate insulating layer 13, and a pattern is etched on the oxide semiconductor film by usin...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 