A Method for Enhancing Clock Synchronization Fault-Tolerance Applicable to Internal Monitor of Compression Master Controller

A technology for compressing the master controller and clock synchronization, applied in the field of network communication, it can solve the problems of global clock synchronization effect, no replacement algorithm failure, etc., and achieve the effect of saving resources, occupying less resources, and improving system stability
CN104009893BActive Publication Date: 2017-03-29BEIHANG UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
BEIHANG UNIV
Publication Date
2017-03-29

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Abstract

The invention discloses a method suitable for monitoring inside a compression master and capable of improving clock synchronization fault tolerance. The method includes the steps that firstly, a clock correction reference value and the optimal protocol control frame corresponding to the clock correction reference value are recorded; secondly, a comprehensive cycle value is extracted from the optimal protocol control frame, and whether the comprehensive value is the same as the frequency of cycles or not is judged; finally, according to the judgment whether the clock correction reference value falls inside a monitoring redundancy receiving window, the compression master is judged, and then the distribution moment of the optimal protocol control frame is determined. According to the method, synchronization information of the local clock is corrected through monitoring the compression master, the synchronization history of the compression master is recorded, under the emergency condition of judgment, historical state information can be issued, original fault information is supplemented, additional information is provided for distributed judgment, depending on a distributed clock synchronization algorithm, the fault tolerance capacity of the compression master is improved, and the immunity, resisting to transient failures, of a system is improved. The method and a physical multi-redundancy mechanism can further supplement each other, reasonable scheme combinations are adopted for different application scenes, and on the basis of optimizing resource consumption, the fault tolerance capacity of the system is guaranteed.
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Description

technical field

[0001] The invention relates to an internal monitoring processing method applied to time-triggered Ethernet, more particularly, a method implemented inside a compression main controller and capable of enhancing clock synchronization fault tolerance. The method enhances the clock synchronization fault-tolerant ability, can enhance the reliability of the time-triggered Ethernet, and belongs to the technical field of network communication. Background technique

[0002] Time-triggered Ethernet (Time-Triggered Ethernet, TTE) is a technology to realize time-triggered communication in the field of switched interconnection real-time communication, which can provide microsecond-level distributed clock synchronization service, and has been used in NASA's manned spacecraft project Obtain practicality, and get the attention of foreign aircraft equipment design and manufacturing enterprises.

[0003] In a distributed system, time-triggered communication depends on a stri...

Claims

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