Parallel access memory system based on optical interconnection

Abstract

The invention discloses a parallel access memory system based on optical interconnection and mainly solves that problems that according to an existing electric bus memory system, the access bandwidth is small, access delay is large, area occupation is large, and board-level circuit data rate is low. The system comprises an optical transmitting layer (101) and memory layers (103). The optical transmitting layer is provided with optical emitters, optical receivers, U-shaped waveguides and broadband micro rings. The optical emitters and the optical receivers are located in the middle of the optical transmitting layer in two rows, and the U-shaped waveguides are arrayed around a reference position. Each memory layer is provided with memory units (104) distributed and arrayed in a grid type, and the memory units in a same rank are perpendicularly distributed on different memory layers. The parallel access performance of the memory system is improved, the data access bandwidth and the data rate are increased, the access delay is reduced, the area occupation of the memory system on a circuit board is reduced, and the memory system can be adaptive to optical communication between a processor core and the memory system.

Description

technical field [0001] The invention belongs to the technical field of communication, in particular to an optically interconnected storage system, which can be used for optical command and optical data communication between a processor core and a storage system. technical background [0002] A storage system used to store data used by processor cores in a computer. The storage system includes a storage controller and a storage unit. A collection of storage units working in lockstep mode is called rank. The storage controller and the rank are connected through an electrical bus, including a chip select bus, an address command bus and a data bus. The memory unit includes an address register, an instruction controller, a row address decoder, a column address decoder, a data latch and a driver, and a memory array. The storage controller and the storage unit are placed on the same layer of the circuit board, the storage controller and the storage unit, and the storage units in...

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Problems solved by technology

[0006] The purpose of the present invention is to address the shortcomings of the existing electrical bus storage system, and propose a parallel access storage system based on optical interconnection to solve the problem of low access bandwidth of the existing electrical bus storage system, large access delay and large area when expanding the storage system. The problem of high overhead and low data rate of board-level circuits

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