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Power management method and system for computer system

A technology for managing computers and power, applied in computing, energy-saving computing, memory systems, etc.

Active Publication Date: 2017-04-12
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In a system with multiple processing units, a first processing unit may consume power while waiting for a result from a second processing unit, and the second processing unit may not be able to perform operations at optimal speed due to the need for more power

Method used

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  • Power management method and system for computer system
  • Power management method and system for computer system
  • Power management method and system for computer system

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Experimental program
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Embodiment Construction

[0009] One embodiment relates to power management of a computing system node, where the node includes a host processor linked or coupled to an active memory device. The active memory device can be any suitable memory device, including one or more memory devices connected to one or more hub chips (also called memory controller chips) configured to control the memory devices (for example, random access memory "RAM" chips). In one embodiment, the active memory device includes multiple layers of memory forming a three-dimensional ("3D") memory device (also referred to as a "memory cube") in which columns of memory chips form stacks that communicate with hub chips. layer or vault. In one embodiment, multiple banks are located on the memory module, with each bank having a corresponding hub chip located below the memory chip. The hub chips may each include a memory controller and one or more processing elements ("PEs"). The processing elements are configured to communicate with ot...

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PUM

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Abstract

Embodiments include a method for managing power in a computer system including a main processor and an active memory device including powered units, the active memory device in communication with the main processor by a memory link, the powered units including a processing element. The method includes the main processor executing a program on a program thread, encountering a first section of code to be executed by the active memory device, changing, by a first command, a power state of a powered unit on the active memory device based on the main processor encountering the first section of code, the first command including a store command. The method also includes the processing element executing the first section of code at a second time, changing a power state of the main processor from a power use state to a power saving state based on the processing element executing the first section.

Description

technical field [0001] The present invention relates generally to computer processing and memory, and more particularly to power management for computing within memory. Background technique [0002] Computer systems often require large amounts of high-speed memory, such as random access memory (RAM), to hold information (eg, data and programs) while the computer is powered on and performing operations. As the performance and complexity of computer systems increase, the demand for memory devices continues to grow. As device complexity increases, managing the power used by processing units (eg, cores) becomes a very important factor in overall computing performance. In a system with multiple processing units, a first processing unit may consume power while waiting for a result from a second processing unit, and the second processing unit may not be able to perform operations at an optimal speed because it requires more power. Contents of the invention [0003] Embodiments ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32
CPCG06F1/3228G06F1/3243G06F9/4893G06F13/00G06F13/1663G06F1/3234G06F1/3275G06F1/3278G06F9/44Y02D10/00Y02D30/50G06F3/0656G06F9/3877G06F2212/312
Inventor P·博塞B·M·弗莱舍T·W·福克斯H·M·雅各布森R·奈尔
Owner INT BUSINESS MASCH CORP