A monitoring method and device for a slave core state

A state and normalization technology, applied in the CPU application field, can solve the problems of the main core occupying a large amount of CPU time, increasing the burden of the main core, and reducing CPU performance, etc.

Active Publication Date: 2017-06-27
MAIPU COMM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the process of realizing slave core state monitoring according to the above method, the inventor found that: due to the large number of slave cores managed by the master core, the master core must occupy a large amount of CPU time, and a large amount of memory is required to store slave core state information, causing the master core to The burden is increased, which greatly reduces the CPU performance

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  • A monitoring method and device for a slave core state
  • A monitoring method and device for a slave core state
  • A monitoring method and device for a slave core state

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Embodiment Construction

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0021] An embodiment of the present invention provides a monitoring method for a slave core state. The method is applied to a logic device, the logic device at least includes a timer module, and the logic device is connected to a CPU to be tested. The main core of the CPU to be tested is configured with N channels, and these channels correspond to the slave cores to be tested, where N is a natural number and the value of N is greater than or equal to the number of s...

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Abstract

The invention discloses a monitoring method and device for a slave core state, relates to the technical field of CPU application, provides a new monitoring method, and realizes the state monitoring of a slave core while ensuring that the performance of the CPU is not reduced. The embodiment provided by the present invention is applied to a logic device, the logic device is connected with the CPU to be tested, and at least includes a timer module in this logic device, the main core of the CPU to be tested is configured with N channels, and these channels are connected to the slave to be tested nuclear correspondence. First, set a timing period, and when the timing period expires, continuously transmit N pulses, and monitor the slave core to be tested according to the time division multiplexing principle according to the time divided by the N pulses. The technical scheme provided by the invention is mainly applied in the monitoring process of the CPU slave core.

Description

technical field [0001] The present invention relates to the field of CPU (Central Processing Unit, central processing unit) application technology, in particular to a method and device for monitoring slave core states. Background technique [0002] With the improvement of existing embedded devices (such as mid- and high-end routers), the CPU cores of these devices have developed from single-core to multi-core or even multi-core. In order for embedded devices to run normally and efficiently, it is necessary to monitor The running status of these CPU cores. [0003] When the CPU is a multi-core or many-core CPU, these CPU cores are divided into one main core and several slave cores, and the status of the CPU slave cores is monitored through the CPU master core software. When monitoring the state of the slave core through the master core software, the master core records the last communication time between the slave core and the master core for each individual task through the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/30
Inventor 李建国
Owner MAIPU COMM TECH CO LTD
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