Manufacturing method of trench mos transistor with electrostatic discharge protection circuit

Abstract

The invention discloses a method for manufacturing a trench MOS transistor with an electrostatic discharge protection circuit. The steps include: 1) epitaxial growth and trench etching; 2) thick gate oxide deposition and etching back at the bottom of the trench; 3) Undoped polysilicon deposition; 4) First polysilicon implantation; 5) Second polysilicon implantation; 6) Polysilicon back etching, forming gate polysilicon and electrostatic discharge protection circuit polysilicon; 7) Well implantation; 8) Source injection. Subsequently, an interlayer dielectric layer, a contact hole, a top layer metal and a back metal are formed according to a conventional process. On the basis of the traditional technology, the present invention uses the thick gate oxide structure at the bottom of the trench as the insulating layer between the electrostatic discharge protection circuit and the trench power device, and then forms the trench by polycrystalline deposition, combined with photolithography partition injection and etching back Groove polysilicon and electrostatic discharge protection circuit polysilicon, thus reducing a photolithography layer in the active area, and one polysilicon deposition and etching back, thereby shortening the process flow.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing a trench MOS transistor with an electrostatic discharge protection circuit. Background technique [0002] In a semiconductor integrated circuit, the structure of a typical power MOS transistor with an electrostatic discharge protection circuit is as follows: figure 1 As shown, an insulating area is specially made for the deposition of polysilicon for the electrostatic discharge protection circuit. The insulating region is generally formed by thermal oxygen deposition, which has a certain degree of consumption of the epitaxial layer. Therefore, in order to achieve a one-click breakdown voltage device, the epitaxial layer usually used is more than that required by ordinary power MOS transistors without electrostatic discharge protection circuits. The epitaxial layer is thicker. In addition, in the structure of a typical power MOS transist...

AI Technical Summary

Problems solved by technology

In addition, in the structure of a typical power MOS transistor with electrostatic discharge protection circuit, there is a height difference between the active area and the electrostatic protection area, forming steps, which will cause certain difficulties for the planarization of the subsequent process, and there will be residual risks in metal etching

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