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A buffer configuration method and device

A configuration method and a technology of a configuration device, which are applied in the field of data transmission, can solve the problems of buffer occupation, full BD ring, and large number of caches, and achieve the effects of simple algorithm, reduction of cache occupancy, and improvement of cache utilization

Active Publication Date: 2017-08-29
MAIPU COMM TECH CO LTD
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  • Summary
  • Abstract
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  • Claims
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Problems solved by technology

But there is a disadvantage: at any time the BD ring is full, taking up n buffers
[0029] For the above two solutions, the defects are not obvious on low-speed and low-density interfaces, but once on high-speed and high-density devices, the number of caches occupied will be large, and the defects will be very obvious

Method used

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  • A buffer configuration method and device
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Embodiment

[0059] The technical scheme of the present invention will be described in detail below by taking the Gigabit Ethernet port as an example. Such as image 3 As shown, this example includes the steps:

[0060] 1. Construct a BD ring with a length of n, and initialize it to an unacceptable state first.

[0061] 2. During initialization, pre-apply for m buffers and store them in the buffer pool. They are used to request buffers when mounting BDs in batches, so as to avoid applying for buffers from the system and reduce time overhead. Then apply for m buffers, connect to the first m BDs of the BD ring, and initialize the corresponding BDs to the "receivable" state, and start hardware reception.

[0062] 3. When a BD finishes receiving DMA data, an interrupt is generated.

[0063] 4. Query the number of BDs currently received in the interrupt service routine, assuming it is z. Get z buffers from the buffer pool, starting after the last BD that was last mounted. And initialize th...

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Abstract

The present invention relates to data transmission technology. The present invention discloses a buffer configuration method aimed at the problem that the DMA data transmission system in the prior art occupies a large buffer, including the steps: A, constructing a buffer descriptor BD ring with a length of n, and initializing it as an unacceptable state; n It is a positive integer, determined by system parameters; B, apply for m buffers, and store them in the buffer pool; m is a positive integer, m<n; C, apply for k buffers, and connect to the first k of the BD ring above, the corresponding BD is placed in the receivable state, and the hardware reception is started, k is a positive integer, k≤m; after D and BD complete the direct memory access DMA data reception, query the number z of the currently received BDs, from the buffer pool Take z buffers among them, hook them up behind the kth BD of the BD ring, set the corresponding BDs to a receivable state, release the receiving semaphore, and wake up the receiving task. The algorithm of the invention is simple, and can ensure that the cache occupation is reduced under the condition that the performance is not affected.

Description

technical field [0001] The invention relates to data transmission technology, in particular to a data transmission system buffer configuration method and device. Background technique [0002] With the rapid development of the network, the performance of network equipment has been greatly improved. Taking router equipment as an example, the interface speed has developed from the previous 100M port to the current 10M port. In the form of presentation, the number of solidified ports and expandable ports is also increasing. The improvement of network equipment performance will inevitably require a corresponding increase in CPU processing speed and memory capacity. For any kind of device, memory is an important resource. Under the condition of certain performance, the software consumes as little memory as possible. [0003] Among data communication devices, a router is a data routing device that works at the edge of the network. Each communication interface in a router may di...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/883H04L49/9015
Inventor 王刚杨大川
Owner MAIPU COMM TECH CO LTD
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