Shifting register and driving method thereof
A shift register, shift register circuit technology, applied in static memory, digital memory information, instruments, etc., can solve the problems of abnormal display of display units, abnormal drive of display units, etc., to ensure the effect of normal driving
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Embodiment 1
[0048] Such as figure 1 A circuit diagram of a shift register circuit is shown, which includes 9 thin film transistors, 2 capacitors C1 and C2, wherein the reset module includes two thin film transistors M1 and M2, and a switch thin film transistor M3, which is used to output the drive signal Thin film transistors M4 and M5, thin film transistors M6, M7, M8, M9 for pull-down potential. Among them, the first node is P, the second node is Q, Gout is the main output, the main input terminal STP is used to input the initial signal, Gn+1 is the input terminal of the signal fed back from the output terminal of the next-level shift register circuit, VGL It is a low-level signal source, an input terminal of the reset signal Reset, an input terminal of the first clock signal CLK, and an input terminal of the second clock signal CLKB, wherein the first clock signal CLK and the second clock signal CLKB are inverted. Such as figure 1 The driving process of the shift register circuit to ...
Embodiment 2
[0058] Such as figure 2 The shown embodiment of the present invention provides a shift register, the shift register includes a multi-stage cascaded shift register circuit, and each stage of the shift register circuit includes:
[0059] The main output terminal Gout is used to output drive signals, including high-level drive signals and low-level drive signals;
[0060] a main input module 201, configured to receive an initial signal STP;
[0061] The first output module 202 is connected between the main input module 201 and the main output terminal Gout, and is used to output a high-level driving signal according to the second clock signal. The main input module 201 and the first output The node between the modules 202 is the first node P;
[0062] The second output module 203 is connected to the main output terminal Gout, and is used to output a low-level driving signal according to the first clock signal;
[0063] It also includes: a first reset module 204, configured to...
Embodiment 3
[0073] Such as image 3 A kind of shift register provided by an embodiment of the present invention is shown, the shift register includes multi-stage cascaded shift register circuits, and each stage of shift register circuits is figure 2 On the basis of the shift register circuit shown, a thin film transistor M0 is added in the first reset module, such as image 3 As shown, the shift register circuit includes: a main output terminal Gout for outputting driving signals, including high-level driving signals and low-level driving signals;
[0074] a main input module 201, configured to receive an initial signal STP;
[0075] The first output module 202 is connected between the main input module 201 and the main output terminal Gout, and is used to output a high-level driving signal according to the second clock signal. The main input module 201 and the first output The node between the modules 202 is the first node P;
[0076] The second output module 203 is connected to the ...
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