Multi-chip semiconductor packaging structure and manufacturing method

Abstract

The invention discloses a multi-chip semiconductor packaging structure and a manufacturing method. The packaging structure includes a semiconductor chip. The second surface of the semiconductor chip is formed with an opening and a groove extending toward the first surface, and the groove is connected to the components of the semiconductor chip. The region faces away, the opening faces away from the first pad of the semiconductor chip and exposes the first pad; the second surface, the inner wall of the groove and the inner wall of the opening are sequentially formed with a first insulating layer, a metal wiring layer and a second insulating layer , at least one functional chip is placed in the groove, and other vacant spaces in the groove are filled with insulating materials, and the metal wiring layer is electrically connected to the first pad and the pad of the functional chip. This packaging structure can be used without increasing the thickness of the package Based on the system packaging, the manufacturing method of the packaging structure utilizes the wafer-level chip size packaging technology, and the overall packaging is performed first, and then the wafer is cut into individual chips, which reduces the production cost.

Description

technical field [0001] The invention relates to a semiconductor packaging structure and technology, in particular to a multi-chip semiconductor packaging structure and a manufacturing method. Background technique [0002] With the increasing diversification of requirements for memory characteristics of various portable information devices and the development trend of short, small, light and thin electronic products, the current development direction of semiconductor bare chip packaging structure is to package several chips in one system. Multi-chip (Multi-Chip Package, MCP) packaging structure. It is used to achieve the requirements of multiple functions or multiple performances on one package. The multi-chip packaging structure is to integrate different types of chips, such as memory chips, memory chips, flash chips, etc., into one package. [0003] However, to integrate multiple chips in a limited chip area, the packaging thickness, reliability and cost of materials need...

AI Technical Summary

Problems solved by technology

[0003] However, to integrate multiple chips in a limited chip area, the packaging thickness, reliability and cost of materials need to be solved

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